A simple PLL-based true random number generator for embedded digital systems

Computing and Informatics

Volumn 23, Issue 5-6, 2004, Pages 501-515

  Drutarovský, Miloš ^a   Šimka, Martin ^a   Fischer, Viktor ^b,c   Celle, Frédéric ^b  

^a TECHNICAL UNIVERSITY OF KO ICE   (Slovakia)

^b UNIVERSITÉ JEAN MONNET   (France)

^c Micronic   (Slovakia)

Author keywords

Clock jitter; Cryptography; DIEHARD; FPGA; NIST; PLL; Statistical tests; TRNG

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER HARDWARE; CRYPTOGRAPHY; FIELD PROGRAMMABLE GATE ARRAYS; JITTER; MATHEMATICAL MODELS; OSCILLATORS (ELECTRONIC); PHASE LOCKED LOOPS; RANDOM PROCESSES; SPURIOUS SIGNAL NOISE; STATISTICAL TESTS;

CLOCK JITTERS; DIEHARD; NIST; TRUE RANDOM NUMBER GENERATOR (TRNG);

EMBEDDED SYSTEMS;

EID: 21644445782     PISSN: 13359150     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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