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Volumn , Issue , 2004, Pages 95-98

An ASIC implementation for V-BLAST detection in 0.35 μm CMOS

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ANTENNAS; CMOS INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; MATHEMATICAL MODELS; MATRIX ALGEBRA; PACKET NETWORKS; VLSI CIRCUITS;

EID: 21544459910     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (3)

References (15)
  • 1
    • 0030234863 scopus 로고    scopus 로고
    • Layered space-time architecture for wireless communication in fading environments when using multiple antennas
    • Autumn
    • G. J. Foschini, "Layered space-time architecture for wireless communication in fading environments when using multiple antennas," Bell Labs. Tech. J., vol. 2, Autumn 1996.
    • (1996) Bell Labs. Tech. J. , vol.2
    • Foschini, G.J.1
  • 4
    • 0032217929 scopus 로고    scopus 로고
    • V-BLAST: An architecture for realizing very high data rates over the rich-scattering wireless channel
    • Pisa, Italy, Sept.
    • P. W. Wolniansky, G. J. Foschini, G. D. Golden, and R. A. Valenzuela, "V-BLAST: an architecture for realizing very high data rates over the rich-scattering wireless channel," in Proc. ISSSE, Pisa, Italy, Sept. 1998.
    • (1998) Proc. ISSSE
    • Wolniansky, P.W.1    Foschini, G.J.2    Golden, G.D.3    Valenzuela, R.A.4
  • 7
  • 8
    • 0036283077 scopus 로고    scopus 로고
    • Modified decouelating decision-feedback detection of BLAST space-time system
    • W. Zha and S. D. Blostein, "Modified decouelating decision-feedback detection of BLAST space-time system," in IEEE International Conference on Communications, vol. 1, 2002.
    • (2002) IEEE International Conference on Communications , vol.1
    • Zha, W.1    Blostein, S.D.2
  • 11
    • 0026898138 scopus 로고
    • CORDIC-based VLSI architectures for digital signal processing
    • July
    • Y. H. Hu, "CORDIC-based VLSI architectures for digital signal processing," IEEE Siganl Processing Magazine, July 1992.
    • (1992) IEEE Siganl Processing Magazine
    • Hu, Y.H.1
  • 13
    • 0030191967 scopus 로고    scopus 로고
    • VLSI systolic arrays for adaptive nulling
    • C. Rader, "VLSI systolic arrays for adaptive nulling," IEEE Signal Processing Magazine, vol. 13, no. 4, pp. 29-49, 1996.
    • (1996) IEEE Signal Processing Magazine , vol.13 , Issue.4 , pp. 29-49
    • Rader, C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.