Ultra-low-power variable-resolution successive approximation ADC for biomedical application

Electronics Letters

Volumn 41, Issue 11, 2005, Pages 634-635

  Le, H P ^a   Singh, J ^a   Hiremath, L ^a   Mallapur, V ^a   Stojcevski, A ^a  

^a VICTORIA UNIVERSITY   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPROXIMATION THEORY; BIOMEDICAL ENGINEERING; CONTROL EQUIPMENT; ELECTRIC POWER UTILIZATION; FLIP FLOP CIRCUITS; SAMPLING; SIGNAL PROCESSING;

BINARY SEARCH; CHIP AREA; CLOCK CYCLES; DIGITAL FLIP-FLOP;

ANALOG TO DIGITAL CONVERSION;

EID: 20344393107     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20050490     Document Type: Article

References (5)

1. Bruce, E.N.: 'Biomedical signal processing and signal modeling' (John Wiley & Sons, Inc., New York, 2001)
2. Mortezapour, S., and Lee, E.K.F.: 'A 1-V, 8-bit successive approximation ADC in standard CMOS process', IEEE J. Solid State Circuits, 2000, 35, pp. 642-646
3. Le, H.P., Zayegh, A., and Singh, J.: 'Performance analysis of high-accuracy CMOS sample-and-hold circuits'. Proc. SPIE Int. Symp. on Microelectronics, MEMS, and Nanotechnology, Perth, Australia, 2003, 5274, pp. 269-276
4. Le, H.P., Zayegh, A., and Singh, J.: 'Performance analysis of optimised CMOS comparator', Electron. Lett., 2003, 39, pp. 833-835
5. Allen, P.E., and Holberg, D.R.: 'CMOS analog circuit design' (Oxford University Press, 2002)