Novel integrated CMOS pixel structures for vertex detectors

IEEE Nuclear Science Symposium Conference Record

Volumn 1, Issue , 2003, Pages 335-339

  Kleinfelder, Stuart ^a   Bieser, Fred ^b   Chen, Yandong ^a   Gareus, Robin ^b   Matis, Howard S ^b   Oldenburg, Markus ^b   Retiere, Fabrice ^b   Ritter, Hans Georg ^b   Wieman, Howard H ^b   Yamamoto, Eugene ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b LAWRENCE BERKELEY NATIONAL LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CHARGE TRANSFER; DATA REDUCTION; ELECTRIC POTENTIAL; PHOTODIODES; SIGNAL TO NOISE RATIO;

ACTIVE PIXEL SENSORS (APS); CORRELATED DOUBLE SAMPLING (CDS); OFFSET CORRECTIONS; PHOTOGATES;

CMOS INTEGRATED CIRCUITS;

EID: 19944427618     PISSN: 10957863     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/nssmic.2003.1352058     Document Type: Conference Paper

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