Coupling effect between the front and back interfaces in thin SOI MOSFETs

Microelectronic Engineering

Volumn 80, Issue SUPPL., 2005, Pages 245-248

  Ohata, A ^a   Cristoloveanu, S ^a   Vandooren, A ^b   Casse M ^c   Dauge F ^a  

^a IMEP LAHC   (France)

^b FREESCALE SEMICONDUCTOR INC   (United States)

^c CEA LETI   (France)

Author keywords

Coupling effect; MOSFETs; Series resistance; Thin SOI

Indexed keywords

CAPACITANCE; DOPING (ADDITIVES); ELECTRIC RESISTANCE; GATES (TRANSISTOR); INTERFACES (MATERIALS); POLYSILICON; SEMICONDUCTOR QUANTUM WELLS; SILICON ON INSULATOR TECHNOLOGY; THRESHOLD VOLTAGE; TRANSCONDUCTANCE;

COUPLING EFFECTS; GATE OXIDE THICKNESS; SERIES RESISTANCE; THIN SOI;

MOSFET DEVICES;

EID: 19944405122     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2005.04.075     Document Type: Conference Paper

References (7)

1. International Technology Roadmap for Semiconductors: 2004 update Austin, TX: SEMATECH, 2004.
2. U. Avci, and S. Tiwari Electronics Letters 8 2004 74
3. R. Tsuchiya, M. Horiuchi, S. Kimura, M. Yamaoka, T. Kawahara, S. Maegawa, T. Ipposhi, Y. Ohji and H. Matsuoka, IEDM Proc., pp. 631-634, 2004.
4. T. Ouisse, S. Cristoloveanu, and G. Brel Solid State Electronics 35 2 1992 142 149
5. A. Ohata, J. Pretet, S. Critoloveanu, and A. Zaslavsky IEEE Tran on Electron Devices 52 2005 124 126
6. H.K. Lim, and J.G. Fossum IEEE Trans. on Electron Devices 30 1983 1244 1251
7. M. Cassé, T. Poiroux, O. Faynot, C. Raynaud, C. Tabone, F. Allain, and G. Reimbold, Proceedings of ESSDERC, pp. 87-90, 2003.