Correct biasing rules for virtual DG mode operation in SOI-MOSFETs

IEEE Transactions on Electron Devices

Volumn 52, Issue 1, 2005, Pages 124-125

  Ohata, Akiko ^a   Pretet, Jeremy ^b   Cristoloveanu, Sorin ^a   Zaslavsky, Alexander ^c  

^a IMEP LAHC   (France)

^b STMICROELECTRONICS   (France)

^c Brown University   (United States)

Author keywords

Field effect transistors (FETs); MOS devices; Silicon on insulator (SOI) technology

Indexed keywords

COMPUTER SIMULATION; GATES (TRANSISTOR); MOS DEVICES; SILICON ON INSULATOR TECHNOLOGY; THRESHOLD VOLTAGE; TRANSCONDUCTANCE;

DOUBLE GATE OPERATION; SILICON-ON-INSULATOR METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS;

MOSFET DEVICES;

EID: 12344302317     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.841273     Document Type: Article

References (6)

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