Low-power low-voltage reference using peaking current mirror circuit

Electronics Letters

Volumn 41, Issue 10, 2005, Pages 572-573

  Cheng, M H ^a   Wu, Z W ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CARRIER CONCENTRATION; CMOS INTEGRATED CIRCUITS; ELECTRIC IMPEDANCE; ENERGY GAP; MICROPROCESSOR CHIPS; MIRRORS; MOSFET DEVICES; NETWORKS (CIRCUITS); SPECIFICATIONS;

DRAIN CURRENT; DRAIN-SOURCE VOLTAGE; POWER DISSIPATION; POWER SUPPLY; THERMAL VOLTAGE;

ELECTRIC POTENTIAL;

EID: 19944385259     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20050316     Document Type: Article

References (7)

1. Widlar, R.J.: 'New developments in IC voltage regulators', IEEE J. Solid-State Circuits, 1971, SC-6, pp. 2-7
2. Gray, P.R., Hurst, P.J., Lewis, S.H., and Meyer, R.G.: 'Analysis and design of analog integrated circuits' (John Wiley & Sons, New York, 2001, 4th edn.)
3. Rincon-Mora, G.A.: 'Voltage references-from diodes to precision high-order bandgap circuits' (Wiley, New York, 2002)
4. Razavi, B.: 'Design of analog CMOS integrated circuits' (McGraw-Hill, New York, 1994)
5. Giustolisi, G., et al.: 'A low-voltage low-power voltage reference based on subthreshold MOSFETs', IEEE J. Solid-State Circuits, 2003, 38, (1), pp. 151-154
6. Kerns, D.V.: 'Optimization of the peaking current source', IEEE J. Solid-State Circuits, 1986, 21, (4), pp. 587-590
7. Kerns, D.V.: 'Enhanced peaking current reference', IEEE J. Solid-State Circuits, 1988, 23, (3), pp. 869-872