Efficient model checking of hardware using conditioned slicing

Electronic Notes in Theoretical Computer Science

Volumn 128, Issue 6, 2005, Pages 279-294

  Vasudevan, Shobha ^a   Emerson, E Allen ^b   Abraham, Jacob A ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^b University of Texas at Austin   (United States)

Author keywords

Abstraction based Verification; Conditioned Slicing; Hardware Description Languages; Hardware Verification; LTL property; Model Checking; Program Slicing; Safety properties

Indexed keywords

ABSTRACTION BASED VERIFICATION; CONDITIONED SLICING; HARDWARE VERIFICATION; LTL PROPERTY; MODEL CHECKING; PROGRAM SLICING; SAFETY PROPERTIES;

ABSTRACTING; CODES (SYMBOLS); COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER SCIENCE; COMPUTER SOFTWARE; STATE SPACE METHODS;

COMPUTER HARDWARE DESCRIPTION LANGUAGES;

EID: 18744393723     PISSN: 15710661     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.entcs.2005.04.017     Document Type: Conference Paper

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