Predictive reliability models through validated correlation between power cycling and thermal cycling accelerated life tests

Soldering and Surface Mount Technology

Volumn 14, Issue 3, 2002, Pages

  Towashiraporn, P ^a   Subbarayan, G ^a   McIlvanie, B ^b   Hunter, B C ^c   Love, D ^d   Sullivan, B ^e  

^a UNIVERSITY OF COLORADO   (United States)

^b Jabil Circuits ^*  (United States)

^c Sun StorageTek   (United States)

^d SUN MICROSYSTEMS   (United States)

^e High Density Packaging Users Group (HDPUG)   (United States)

Author keywords

Fatigue; Finite element method; Thermal testing

Indexed keywords

BOUNDARY CONDITIONS; CHIP SCALE PACKAGES; FATIGUE OF MATERIALS; FATIGUE TESTING; MATHEMATICAL MODELS; MICROSTRUCTURE; NATURAL CONVECTION; RELIABILITY; THERMAL CYCLING;

POWER CYCLING;

SOLDERED JOINTS;

EID: 18644361956     PISSN: 09540911     EISSN: None     Source Type: Journal    
DOI: 10.1108/09540910210444737     Document Type: Conference Paper

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