-
2
-
-
0036712470
-
The impact of gate oxide breakdown on SRAM stability
-
Rodriguez R, Stathis JH, Linder BP, Kowalczyk S, Chuang CT, Joshi RV, Northrop G, Bernstein K, Bhavnagarwala AJ, Lombardo S. The impact of gate oxide breakdown on SRAM stability. IEEE Electron Device Lett 2002; 23(9):559-561.
-
(2002)
IEEE Electron Device Lett
, vol.23
, Issue.9
, pp. 559-561
-
-
Rodriguez, R.1
Stathis, J.H.2
Linder, B.P.3
Kowalczyk, S.4
Chuang, C.T.5
Joshi, R.V.6
Northrop, G.7
Bernstein, K.8
Bhavnagarwala, A.J.9
Lombardo, S.10
-
3
-
-
0034453380
-
Impact of MOSFET oxide breakdown on digital circuit operation and reliability
-
Kaczer B, Degraeve R, Groeseneken G, Rasras M, Kubicek S, Vandamme E, Badenes G. Impact of MOSFET oxide breakdown on digital circuit operation and reliability. IEDM Tech. Dig., 2000. p. 553-556.
-
(2000)
IEDM Tech. Dig.
, pp. 553-556
-
-
Kaczer, B.1
Degraeve, R.2
Groeseneken, G.3
Rasras, M.4
Kubicek, S.5
Vandamme, E.6
Badenes, G.7
-
4
-
-
0033700294
-
A high performance 0.13 μm SOI CMOS technology with Cu interconnects and low-k BEOL dielectric
-
Smeys P, McGahay V, Yang I, Adkisson J, Beyer K, Bula O, Chen Z, Chu B, Culp J, Das S, Eckert A, Hadel L, Hargrove M, Herman J, Lin L, Mann R, Maciejewski E, Narasimha S, O'Neil P, Rauch S, Ryan D, Toomey J, Tsou L, Varekamp P, Wachnik R, Wagner T, Wu S, Yu C, Agnello P, Connolly J, Crowder S, Davis C, Ferguson R, Sekiguchi A, Su L, Goldblatt R, Chen TC. A high performance 0.13 μm SOI CMOS technology with Cu interconnects and low-k BEOL dielectric. VLSI Tech. Symp. 2000. p. 184-185.
-
(2000)
VLSI Tech. Symp. 2000
, pp. 184-185
-
-
Smeys, P.1
McGahay, V.2
Yang, I.3
Adkisson, J.4
Beyer, K.5
Bula, O.6
Chen, Z.7
Chu, B.8
Culp, J.9
Das, S.10
Eckert, A.11
Hadel, L.12
Hargrove, M.13
Herman, J.14
Lin, L.15
Mann, R.16
Maciejewski, E.17
Narasimha, S.18
O'Neil, P.19
Rauch, S.20
Ryan, D.21
Toomey, J.22
Tsou, L.23
Varekamp, P.24
Wachnik, R.25
Wagner, T.26
Wu, S.27
Yu, C.28
Agnello, P.29
Connolly, J.30
Crowder, S.31
Davis, C.32
Ferguson, R.33
Sekiguchi, A.34
Su, L.35
Goldblatt, R.36
Chen, T.C.37
more..
-
5
-
-
0033725296
-
Gate oxide breakdown under current limited constant voltage stress
-
Linder BP, Stathis JH, Wachnik RA, Wu E, Cohen SA, Ray A, Vayshenker A. Gate oxide breakdown under current limited constant voltage stress. VLSI Technol. Symp. Dig. 2000. p. 214-215.
-
(2000)
VLSI Technol. Symp. Dig. 2000
, pp. 214-215
-
-
Linder, B.P.1
Stathis, J.H.2
Wachnik, R.A.3
Wu, E.4
Cohen, S.A.5
Ray, A.6
Vayshenker, A.7
-
6
-
-
0038782425
-
A thorough investigation of progressive breakdown in ultra-thin oxides. Physical understanding and application for industrial reliability assessment
-
Monsieur F, Vincent E, Roy D, Bruyere S, Vildeuil JC, Pananakakis G, Ghibaudo G. A thorough investigation of progressive breakdown in ultra-thin oxides. Physical understanding and application for industrial reliability assessment. IRPS Proc. 2002. p. 45-54.
-
(2002)
IRPS Proc. 2002
, pp. 45-54
-
-
Monsieur, F.1
Vincent, E.2
Roy, D.3
Bruyere, S.4
Vildeuil, J.C.5
Pananakakis, G.6
Ghibaudo, G.7
-
7
-
-
0345201638
-
A function-fit model for the soft breakdown failure mode
-
Miranda E, Suñé J, Rodríguez R, Nafría M, Aymerich X. A function-fit model for the soft breakdown failure mode. IEEE Electron Device Lett. 1999; 20:265-267.
-
(1999)
IEEE Electron Device Lett.
, vol.20
, pp. 265-267
-
-
Miranda, E.1
Suñé, J.2
Rodríguez, R.3
Nafría, M.4
Aymerich, X.5
-
8
-
-
0027803918
-
A bi-directional NMOSFET current reduction model for simulation of hot-carrier induced circuit degradation
-
Quader KN, Li CC, Tu R, Rosenbaum E, Ko PK, Hu C. A bi-directional NMOSFET current reduction model for simulation of hot-carrier induced circuit degradation. IEEE Trans. Electron Devices 1993; 40(12):2245-2254.
-
(1993)
IEEE Trans. Electron Devices
, vol.40
, Issue.12
, pp. 2245-2254
-
-
Quader, K.N.1
Li, C.C.2
Tu, R.3
Rosenbaum, E.4
Ko, P.K.5
Hu, C.6
|