Performance analysis of a CMOS analog to digital converter for wireless telecommunications

International Symposium on IC Technology, Systems and Applications

Volumn 9, Issue , 2001, Pages 59-62

  Stojcevski, A ^a   Singh, J ^a   Zayegh, A ^a  

^a VICTORIA UNIVERSITY   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CALCULATIONS; COMPARATOR CIRCUITS; COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; LINEAR INTEGRATED CIRCUITS; SIGNAL TO NOISE RATIO; WIRELESS TELECOMMUNICATION SYSTEMS;

FLASH ANALOG TO DIGITAL CONVERTER; FLASH CONVERTER; LINEAR CIRCUIT; SIGNAL TO QUANTISATION NOISE RATIO;

CMOS INTEGRATED CIRCUITS;

EID: 1842791652     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. J. Singh, A. Zayegh, A. Kalam, R. Malyniak, "New design approach for GaAs MESFET analog-to-digital converter", IEEE Int. Symposium on IC technology systems & Applications, 1997, pp. 672-675.
2. F. Maloberti, "High Speed Data Converters and New Telecommunication Needs", Conference Proceeding IEEE, Tucson Arizona, 1999, pp. 147-150.
3. A. M. Abo, P. R. Gray, "A 1.5-V, 10-bit, 14.3-MS/s CMOS Pipeline Analog-to-Digital Converter", IEEE Journal of Solid State Circuits, vol. 34, 1999, p. 599-606.
4. I. E. Opris, L. Lewicki, B. Wong, "A Single-Ended 12b 20M Sample/s Self Calibrating Pipeline A/D Converter", IEEE Journal of Solid State Circuits, vol. 33, 1998, pp. 1898-1903.