A modified frequency-response masking structure for high-speed FPGA implementation of sharp FIR filters

Journal of Circuits, Systems and Computers

Volumn 12, Issue 5, 2003, Pages 643-654

  Lian, Yong ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

FIR filter design; High speed low power filters

Indexed keywords

FIR FILTER DESIGN; HIGH-SPEED LOW-POWER FILTERS;

BANDWIDTH; FIELD PROGRAMMABLE GATE ARRAYS; FREQUENCY RESPONSE; INTERPOLATION; SIGNAL PROCESSING; VLSI CIRCUITS;

FIR FILTERS;

EID: 1842613665     PISSN: 02181266     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0218126603001069     Document Type: Article

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