Shuttle Mask Floorplanning

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5256, Issue 1, 2003, Pages 185-194

  Xu, Gang ^a   Tian, Ruiqi ^b   Wong, D F ^c   Reich, Alfred ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^b MOTOROLA INC   (United States)

^c UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

Floorplanning; Merging method; Shuttle mask; Simulated annealing

Indexed keywords

CONSTRAINT THEORY; COSTS; DIES; MICROPROCESSOR CHIPS; PHASE SHIFT; SIMULATED ANNEALING; VLSI CIRCUITS;

FLOOR-PLANNING; SHUTTLE MASKS;

MASKS;

EID: 1842475791     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.517568     Document Type: Conference Paper

References (7)

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