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Volumn 5205, Issue , 2003, Pages 282-290

Interleaver design for high speed turbo decoders

Author keywords

High speed turbo decoder; Interleaver design; Parallel processing; Turbo code

Indexed keywords

ALGORITHMS; BIT ERROR RATE; CHANNEL CAPACITY; DECODING; TURBO CODES;

EID: 1842450904     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.504386     Document Type: Conference Paper
Times cited : (2)

References (8)
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    • Berrou, C.1    Glavieux, A.2    Thitimasjshima, P.3
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    • Soft-input soft-output APP module for iterative decoding of concatenated codes
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    • S. Benedetto, D. Divsalar, G. Montorsi, and F. Pollara, "Soft-input Soft-output APP module for iterative decoding of concatenated codes," IEEE Communication Letters, pp. 22-24, Jan. 97.
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    • Turbo codes for PCS applications
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    • (1995) Proc. ICC'95, WA , vol.1 , pp. 54-59
    • Divsalar, D.1    Polara, F.2
  • 8
    • 0036602281 scopus 로고    scopus 로고
    • A code-matched interleaver design for turbo codes
    • Jun.
    • W. Feng, J. Yuan, and B.S. Vucetic, "A Code-Matched Interleaver Design for Turbo Codes," IEEE Trans. on Comm. Vol. 50 No. 6, pp. 926-937, Jun. 2002
    • (2002) IEEE Trans. on Comm. , vol.50 , Issue.6 , pp. 926-937
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.