Circuit and technique for characterizing switching delay history effects in silicon-on-insulator logic gates

Review of Scientific Instruments

Volumn 75, Issue 3, 2004, Pages 768-771

  Ketchen, Mark B ^a   Bhushan, Manjul ^b   Anderson, Carl J ^b  

^a IBM RESEARCH   (United States)

^b IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HISTORY EFFECTS; SWITCHING DELAY;

BANDWIDTH; CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC INVERTERS; ELECTRIC POTENTIAL; LOGIC GATES; MOS DEVICES; SIGNAL PROCESSING; SWITCHING; VLSI CIRCUITS; WAVEFORM ANALYSIS;

SILICON ON INSULATOR TECHNOLOGY;

EID: 1842427538     PISSN: 00346748     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.1647697     Document Type: Article

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