Performance evaluation of the cray X1 distributed shared-memory architecture

IEEE Micro

Volumn 25, Issue 1, 2005, Pages 30-40

  Dunigan Jr , Thomas H ^a   Vetter, Jeffrey S ^a   White III, James B ^a   Worley, Patrick H ^a  

^a OAK RIDGE NATIONAL LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTER ARCHITECTURE; COMPUTER PROGRAMMING; COMPUTER SIMULATION; DISTRIBUTED COMPUTER SYSTEMS; INTERCONNECTION NETWORKS; MULTIPROCESSING SYSTEMS; PROGRAM COMPILERS;

FUSION SIMULATION; INTERCONNECT BANDWIDTH; MULTISTREAMING PROCESSORS; REMOTE MEMORY ACCESS; SHARED MEMORY ARCHITECTURE;

CACHE MEMORY;

EID: 17644405787     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2005.20     Document Type: Article

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