Simultaneous optimization of driving buffer and routing switch sizes in an FPGA using an iso-area approach

Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI

Volumn 2002-January, Issue , 2002, Pages 35-40

  Chandra, V ^a   Schmit, H ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Computer Society; Constraint optimization; Delay; Field programmable gate arrays; Performance analysis; Performance gain; Routing; Switches; Very large scale integration; Wires

Indexed keywords

CONSTRAINED OPTIMIZATION; INTEGRATED CIRCUIT INTERCONNECTS; SWITCHES; VLSI CIRCUITS; WIRE;

CONSTRAINT OPTIMIZATIONS; DELAY; PERFORMANCE ANALYSIS; PERFORMANCE GAIN; ROUTING;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 17144378683     PISSN: 21593469     EISSN: 21593477     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2002.1016870     Document Type: Conference Paper

References (8)

1. S. Brown, R. Francis, J.Rose and Z. Vranesic, "Field-programmable Gate Arrays," Kluwer Academic Publishers, 1992.
2. V. Betz and J. Rose, "Circuit Design, Transistor Sizing and Wire Layout of FPGA Interconnect," Proc. of Custom Integrated Circuits, 1999.
3. V. Betz, J. Rose, "FPGA Routing Architecture: Segmentation and Buffering to optimize Speed and Density," International symposium on Field programmable gate arrays, 1999, pp. 59-68
4. M. Khellah, S. Brown and Z. Vranesic, "Modeling Routing Delays in SRAM-based FPGAs," Proc. CCVLSI'93, Banff, Alberta, Nov. 1993
5. J. Rubinstein, P. Penfield and M. Horowitz, "Signal Delay in RC Tree Networks," IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, Vol. CAD-2, No.3, July 1983
6. V. Betz, J. Rose, A. Marquedt, "Architecture and CAD for Deep-Submicron FPGAs," Kluwer Academic Publishers, 1999.
7. V. Betz and J. Rose, "VPR: A New Packing, Placement and Routing Tool for FPGA Research," Intl. Workshop on Field Programmable Logic and Applications, 1997, pp. 213-222.
8. G. Lemieux, S. Brown and D. Vranesic, "On two-step routing for FPGAs," Proceedings of the 1997 International Symposium on Physical Design, April 1997, pp. 60-66.