On two-step routing for FPGAs

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 1997, Pages 60-66

  Lemieux, Guy G F ^a   Brown, Stephen D ^a   Vranesic, Daniel ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; GRAPH THEORY; LOGIC CIRCUITS; LOGIC DESIGN; MATHEMATICAL MODELS;

FIELD PROGRAMMABLE GATE ARRAY; MAPPING ANOMALY; ROUTING STRATEGY;

INTEGRATED CIRCUIT LAYOUT;

EID: 0030679965     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/267665.267682     Document Type: Conference Paper

References (22)