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Volumn 39, Issue 4, 2004, Pages 569-576

A 1-V CMOS SOI Bluetooth RF Transceiver Using LC-Tuned and Transistor-Current-Source Folded Circuits

Author keywords

Bluetooth; CMOS; Demodulator; Filter; Low voltage; RF; SOI; Transceiver

Indexed keywords

BIT ERROR RATE; DEMODULATORS; ELECTRIC CURRENTS; ELECTRIC FILTERS; ELECTRIC POTENTIAL; ELECTRIC SWITCHES; PHASE LOCKED LOOPS; SILICON ON INSULATOR TECHNOLOGY; TRANSCEIVERS; TRANSISTORS;

EID: 16544368640     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.824703     Document Type: Article
Times cited : (10)

References (15)
  • 6
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    • 2-GHz RF front-end circuits in CMOS/SIMOX operating at an extremely low voltage of 0.5 V
    • Dec.
    • M. Harada, T. Tsukahara, J. Kodate, A. Yamagishi, and J. Yamada, "2-GHz RF front-end circuits in CMOS/SIMOX operating at an extremely low voltage of 0.5 V," IEEE J. Solid-State Circuits, vol. 35, pp. 2000-2004, Dec. 2000.
    • (2000) IEEE J. Solid-state Circuits , vol.35 , pp. 2000-2004
    • Harada, M.1    Tsukahara, T.2    Kodate, J.3    Yamagishi, A.4    Yamada, J.5
  • 8
    • 0036475105 scopus 로고    scopus 로고
    • A 1-V 2-GHz RF receiver with 49 dB of image rejection in CMOS/SIMOX
    • Feb.
    • _, "A 1-V 2-GHz RF receiver with 49 dB of image rejection in CMOS/SIMOX," IEICE Trans. Fundamentals, vol. 2, pp. 293-299, Feb. 2002.
    • (2002) IEICE Trans. Fundamentals , vol.2 , pp. 293-299
  • 10
    • 0041592518 scopus 로고    scopus 로고
    • A 1-V 2.4-GHz PLL synthesizer with a fully differential prescaler and low-off-leakage charge pump
    • June
    • A. Yamagishi, M. Ugajin, and T. Tsukahara, "A 1-V 2.4-GHz PLL synthesizer with a fully differential prescaler and low-off-leakage charge pump," in IEEE Int. Microwave Symp. (MTT-S) Dig. Tech. Papers, vol. 2, June 2003, pp. 733-736.
    • (2003) IEEE Int. Microwave Symp. (MTT-S) Dig. Tech. Papers , vol.2 , pp. 733-736
    • Yamagishi, A.1    Ugajin, M.2    Tsukahara, T.3
  • 12
    • 0036671176 scopus 로고    scopus 로고
    • A 0.6-V supply, voltage reference circuit based on threshold-voltage- summation architecture in fully depleted CMOS/SOI
    • Aug.
    • M. Ugajin, K. Suzuki, and T. Tsukahara, "A 0.6-V supply, voltage reference circuit based on threshold-voltage-summation architecture in fully depleted CMOS/SOI," IEICE Trans. Electron., vol. E85-C, pp. 1588-1595, Aug. 2002.
    • (2002) IEICE Trans. Electron. , vol.E85-C , pp. 1588-1595
    • Ugajin, M.1    Suzuki, K.2    Tsukahara, T.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.