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Volumn , Issue , 2003, Pages 215-221

Energy-Efficient Discrete Cosine Transform on FPGAs

Author keywords

DCT; Energy efficiency; Performance modeling

Indexed keywords

DISCRETE COSINE TRANSFORM (DCT); PERFORMANCE MODELING; POWER DISSIPATION;

EID: 1642398388     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (4)

References (10)
  • 1
    • 0037622057 scopus 로고    scopus 로고
    • Minimum multiplicative complexity implementation of the 2-D DCT using Xilinx FPGAs
    • November
    • C. Dick, "Minimum multiplicative complexity implementation of the 2-D DCT using Xilinx FPGAs," in Proceedings of SPIE's Photonics East, November 1998.
    • (1998) Proceedings of SPIE's Photonics East
    • Dick, C.1
  • 4
    • 0034504745 scopus 로고    scopus 로고
    • A serial-parallel architecture for two-dimensional discrete cosine and inverse discrete cosine transforms
    • December
    • H. Lim, V. Piuri, and E. E. Swartzlander, Jr., "A serial-parallel architecture for two-dimensional discrete cosine and inverse discrete cosine transforms," IEEE Transactions on Computers, vol. 49, no. 12, pp. 1297-1309, December 2000.
    • (2000) IEEE Transactions on Computers , vol.49 , Issue.12 , pp. 1297-1309
    • Lim, H.1    Piuri, V.2    Swartzlander Jr., E.E.3
  • 9
    • 84862045015 scopus 로고    scopus 로고
    • Xilinx Inc., http://www.xilinx.com.
  • 10
    • 84862051232 scopus 로고    scopus 로고
    • Altera Corp., http://www.altera.com.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.