Verification of the RF subsystem within wireless LAN system level simulation

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2003, Pages 286-291

  Knochel, Uwe ^a   Hartung, Juegen ^b   Kakerow, Relf ^c  

^a FRAUNHOFER INSTITUTE FOR INTEGRATED CIRCUITS   (Germany)

^b Cadence Design System GmbH   (Germany)

^c NOKIA   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPLETE SYSTEM; DIGITAL PARTS; DIGITAL SYSTEM; HIGH COMPLEXITY; HIGH TRANSMISSION RATE; PERFORMANCE REQUIREMENTS; SYSTEM LEVEL SIMULATION; WIRELESS LAN SYSTEM;

DESIGN; EXHIBITIONS; RADIO BROADCASTING; SIGNAL PROCESSING; STANDARDS;

WIRELESS LOCAL AREA NETWORKS (WLAN);

EID: 15944414347     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2003.1253843     Document Type: Conference Paper

References (7)

1. IEEE 802.11a Supplement to Telecommunication and Information exchange between systems- Part 11 High Speed Physical Layer in the 5 GHz Band, IEEE Standards board, May 1999
2. Razavi, B.: A 5.2GHz CMOS Receiver with 62 dB Image rejection. IEEE Journal of Solid state Circuits. Vol. 36, No. 5, May 2001
3. White Paper: High-Speed Wireless LAN Options, Wireless LAN Association, San Jose, http://www.wlana.org/pdf/ highspeed.pdf
4. Cadence Online Documentation, IC446, SPW4.8.1, 2002
5. Open Verilog International (OVI): Verilog-AMS Language Reference Manual, version 2.0, Los Gatos, February 2000
6. Moult, L; Chen, J. E.: The K-model: RF IC Modelling for Communications System Simulation, IEE Colloquium on Analog Signal Processing, October 28, 1998
7. Jeruchim, M.C.; Balaban, P.; K. Shanmugan, K.S.: Simulation ofCommunication Systems, Plenum Press, New York, 1992