CMOS Current-Mode Divider and Its Applications

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 52, Issue 3, 2005, Pages 145-148

  Liu, Weihsing ^a,b   Liu, Shen Iuan ^a   Wei, Shui Ken ^b  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

^b TUNG NAN INSTITUTE OF TECHNOLOGY   (Taiwan)

Author keywords

Divider; exponential function; transresistance

Indexed keywords

ELECTRIC CURRENTS; ELECTRIC RESISTANCE; HARMONIC DISTORTION; INTEGRATED CIRCUIT MANUFACTURE; MOSFET DEVICES; OPERATIONAL AMPLIFIERS; THRESHOLD VOLTAGE; TRANSCONDUCTANCE; VOLTAGE CONTROL;

ANALOG DIVIDER; EXPONENTIAL FUNCTION; TRANSRESISTANCE AMPLIFIER;

CMOS INTEGRATED CIRCUITS;

EID: 15944394356     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2004.842041     Document Type: Article

References (18)

1. C. Mead and M. Ismail, Analog VLSI Implementation of Neural Systems. Norwell, MA: Kluwer, 1989.
2. Nonlinear Circuit Handbook, D. H. Ssheingold, Ed., Analog Devices, Norwood, MA, 1974.
3. F. J. Pelayo, I. Rojas, J. Ortega, and A. Priteo, “Current-mode analogue defuzzifier,” Electron. Lett., vol. 29, no. 9, pp. 743–744, 1993.
4. P. Deval, G. Wegmann, and J. Robert, “CMOS pipelined A/D convertor using current divider,” Electron. Lett., vol. 25, no. 20, pp. 1341–1343, 1989.
5. U. Singh and M. Green, “Dynamics of high-frequency CMOS dividers,” in Proc. IEEE Int. Symp. Circuits Systems, vol. 5, May 2002, pp. 421–424.
6. U. Singh and M. Green, “New structures for very high-frequency CMOS clock dividers,” in Proc. IEEE Int. Symp. Circuits Systems, vol. 4, May 2002, pp. 622–625.
7. D. Ghosh and P. Patranabis, “A simple analog divider having independent control of sensitivity and design conditions,” IEEE Trans. Instrum. Meas., vol. 39, no. 3, pp. 522–526, Jun. 1990.
8. S. I. Liu and C. C. Chang, “CMOS analog divider and four-quadrant multiplierusing pool circuits,” IEEE J. Solid-State Circuits, vol. 30, no. 9, pp. 1025–1029, Sep. 1995.
9. J. G. Graeme, Operational Amplifier Design and Application. New York: McGraw-Hill, 1971.
10. H. Wasaki, Y. Horio, and S. Nakamura, “Current multiplier/divider circuit,” Electron. Lett., vol. 27, no. 6, pp. 504–506, 1991.
11. C. H. J. Mensink and B. Nauta, “CMOS tunable linear current divider,” Electron. Lett., vol. 32, no. 10, pp. 889–890, 1996.
12. B. Wilson, “Recent developments in current conveyor and current-mode circuits,” Proc. Inst. Elect. Eng. G, vol. 137, no. 2, pp. 63–77, 1990.
13. W. Liu and S. I. Liu, “CMOS tunable 1/x circuit and its applications,” IEICE Trans. Fund., vol. E-86A, pp. 1896–1899, Jul. 2003.
14. N. R. Malik, Electronic Circuits. Englewoood Cliffs, NJ: Prentice-Hall, 1995.
15. K. Bult and H. Wallinga, “A class of analog CMOS circuits based on the square law characteristics of an MOS transistor in saturation,” IEEE J. Solid-State Circuits, vol. SC-22, pp. 357–365, Jun. 1987.
16. A. Motamed, C. Hwang, and M. Ismail, “CMOS exponential current-to-voltage converter,” Electron. Lett., vol. 33, no. 12, pp. 998–1000, 1997.
17. W. Liu and S. I. Liu, “CMOS exponential function generator,” Electron. Lett., vol. 39, pp. 1–2, Jan. 2003.
18. C. C. Chang and S. I. Liu, “Pseudo-exponential function using MOS-FETs in saturation,” IEEE Trans. Circuits Systems II, Analog Digit. Signal Process., vol. 47, pp. 1318–1321, Nov. 2000.