Dynamics of high-frequency CMOS dividers

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 5, Issue , 2002, Pages

  Singh, Ullas ^a   Green, Michael ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC NETWORK ANALYSIS; ELECTRIC POTENTIAL; FLIP FLOP CIRCUITS; GRAPH THEORY; OPTIMIZATION; TRANSCONDUCTANCE; TRANSISTORS;

CORRECT DIVIDER OPERATION; QUASI-PERIODIC OPERATION; SELF-OSCILLATION;

FREQUENCY DIVIDING CIRCUITS;

EID: 0036297428     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. 1-GHz and 2.8-GHz CMOS injection-locked ring oscillator prescalers
2. Fully-integrated SONET OC48 transceiver in standard CMOS
3. New structures for very high-frequency CMOS clock dividers
4. A 19Ghz 0.5mW 0.35um CMOS frequency divider with shunt-peaking locking-range enhancement
5. An analytical maximum toggle frequency expression and its application to optimizing high speed ECL frequency dividers