RSFQ signed serial multiplier-accumulator

IEEE Transactions on Applied Superconductivity

Volumn 15, Issue 1, 2005, Pages 49-52

  Joukov, Nikolai A ^a   Tivari, Manoj S ^a   Semenov, Vasili K ^b  

^a Stony Brook University   (United States)

^b STONY BROOK UNIVERSITY   (United States)

Author keywords

Rapid single flux quantum (RSFQ); Serial multiplication

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CODE DIVISION MULTIPLE ACCESS; COMPUTER SOFTWARE; JOSEPHSON JUNCTION DEVICES; MICROSTRIP LINES; OPTIMIZATION; QUANTUM ELECTRONICS; REAL TIME SYSTEMS; SHIFT REGISTERS; SIGNAL PROCESSING; TRANSMISSION LINE THEORY;

MULTIPLIER CARRYSAVE ADDER (CSA); MULTIPLIER-ACCUMULATORS; RAPID SINGLE FLUX QUANTUM (RSFQ); SERIAL MULTIPLICATION;

MULTIPLYING CIRCUITS;

EID: 15844406685     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2005.844189     Document Type: Article

References (15)

1. V. K. Semenov, Y. A. Polyakov, and T. V. Filippov, "Superconducting delta ADC with on-chip decimation filter," IEEE Trans. Appl. Supercond., vol. 9, no. 2, pp. 3027-3029, Jun. 1999.
2. A. Y. Kidiyarova-Shevchenko, K. Y. Platov, E. M. Tolkacheva, and I. A. Kataeva, "RSFQ asynchronous serial multiplier and spreading codes generator for multiuser detector," IEEE Trans. Appl. Supercond., vol. 13, no. 2, pp. 429-432, Jun. 2003.
3. K. K. Likharev and V. K. Semenov, "RSFQ logic/memory family: A new Josephson-junction digital technology for sub-terahertz-clock-frequency digital systems," IEEE Trans. Appl. Supercond., vol. 1, no. 1, pp. 3-28, Mar. 1991.
4. N. Joukov, Y. Hashimoto, and V. Semenov, "Matching Josephson junctions with microstrip lines for SFQ pulses and weak signals," IEICE Trans. Electron., vol. e85-C, no. 3, pp. 636-640, Mar. 2002.
5. J. L. Hennessy and D. A. Patterson, Computer Organization and Design, 2nd ed. San Francisco, CA: Morgan Kaufmann, 1996.
6. O. A. Mukhanov, S. V. Rylov, V. K. Semenov, and S. V. Vyshenskii, "RSFQ logic arithmetic," IEEE Trans. Magn., vol. 25, no. 2, pp. 857-860, Mar. 1989.
7. O. A. Mukhanov and A. F. Kirichenko, "Implementation of a FFT radix 2 butterfly using serial RSFQ multiplier-adders," IEEE Trans. Appl. Supercond., vol. 5, no. 2, pp. 2461-2465, Jun. 1995.
8. Q. P. Herr, N. Vukovic, and C. A. Mancini et al., "Design and low speed testing for a four-bit RSFQ multiplier-accumulator," IEEE Trans. Appl. Supercond., vol. 7, no. 2, pp. 3168-3171, Jun. 1999.
9. A. F. Kirichenko and O. A. Mukhanov, "Implementation of a novel "push-forward" RSFQ carry-save adder," IEEE Trans. Appl. Supercond., vol. 5, no. 2, pp. 3010-3014, Jun. 1995.
10. S. V. Polonsky, J. C. Lin, and A. V. Rylyakov, "RSFQ arithmetic blocks for DSP applications," IEEE Trans. Appl. Supercond., vol. 5, no. 2, pp. 2823-2826, Jun. 1995.
11. O. A. Mukhanov, S. V. Polonsky, and V. K. Semenov, "New elements of the RSFQ logic family," IEEE Trans. Magn., vol. 27, no. 2, pp. 2435-2438, Mar. 1991.
12. S. V. Polonsky, V. K. Semenov, and P. N. Shevchenko, "PSCAN: Personal superconductor circuit analyzer," Supercond. Sci. Technol., vol. 4, no. 11, pp. 667-670, Nov. 1991.
13. HYPRES Design Rules. [Online]. Available: http://www.hypres.com
14. "Cadence Openbook," Cadence Corp., San Jose, CA, 2001.
15. D. Y. Zinoviev and Y. A. Polyakov, "Octopux: An advanced automated setup for testing superconductor circuits," IEEE Trans. Appl. Supercond., vol. 7, no. 2, pp. 3240-3243, Jun. 1997.