Ultra-thin high-density LSI packaging substrate for advanced CSPs and SiPs

Microelectronics Reliability

Volumn 45, Issue 3-4, 2005, Pages 567-574

  Shimoto, Tadanori ^a   Baba, Kazuhiro ^a   Matsui, Koji ^a   Tsukano, Jun ^b   Maeda, Takehiko ^b   Oyachi, Kenji ^b  

^a NEC CORPORATION   (Japan)

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; COPPER; DIELECTRIC MATERIALS; EPOXY RESINS; LSI CIRCUITS; MULTILAYERS; PRINTED CIRCUIT BOARDS; SILICON;

BALL GRID ARRAYS (BGA); DIELECTRIC LAYERS; MULTI-LAYER THIN SUBSTRATE (MLTS); PITCH PATTERNING;

ELECTRONICS PACKAGING;

EID: 15744375335     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2004.08.006     Document Type: Article

References (6)

1. International Technology Roadmap for Semiconductors, 2002 ed., SIA, 2002
2. Nikkei Electronics, No. 847, May 2003. p. 136-45
3. Shimoto T, Kikuchi K, Honda H, Kata K, Baba K, Matsui K. High-performance flip-chip BGA based on multi-layer thin-film packaging technology. In: Proceedings of the 2002 IMAPS. p. 10-5
4. R. Tummala Microelectronic systems packaging technology for the 21st century Adv. Microelectron. 26 3 1999 29 37
5. Enomoto R, Asai M, Hirose N. High density MLB using additive and build-up process. In: Proceedings of the 1998 IMAPS. p. 403-8
6. Dai Nippon Printing Co., Ltd, Ultra-thin high-density core-less LSI packaging substrate, June 2003