Making Failure Analysis a Value Add Proposition in today's High Speed Low Cost PC Environment

Conference Proceedings from the International Symposium for Testing and Failure Analysis

Volumn , Issue , 2002, Pages 609-615

  Lane, Michael ^a   Bjork, Roger ^b   Birdsley, Jeff ^b  

^a INTEL CORPORATION   (United States)

^b NONE

Author keywords

[No Author keywords available]

Indexed keywords

DATA PROCESSING; DATA REDUCTION; FAILURE ANALYSIS; LIFE CYCLE; SOCIETIES AND INSTITUTIONS;

COST SAVINGS; FAILURE SIGNATURES; SUPPLY INFORMATION;

PERSONAL COMPUTERS;

EID: 1542360073     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

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2. "Guideline for Measurement of Electronic Package Inductance and Capacitance Model Parameters" - JEDEC Publication #123, JC-15 Committee, October 1995.
3. "Measuring Controlled-Impedance Boards with TDR" M.D. Tilden, "Measuring Controlled-Impedance Boards with TDR," - Printer Circuit Fabrication, February 1992.
4. "Solder Joint Reliability of BGA, CSP, Flip Chip and Fine Pitch SMT Assemblies," McGraw Hill (1996)
5. th edition, Irwin (1986)
6. "Case Studies of IR Based Rapid PC Motherboard Failure Analysis" J. Swart, J. Woo, R. Zumwalt, J. Birdsley, Y. Taffese - ISTFA Proceedings, November 2002