Evaluation of Fault Handling of the Time-Triggered Architecture with Bus and Star Topology

Proceedings of the International Conference on Dependable Systems and Networks

Volumn , Issue , 2003, Pages 123-132

  Ademaj, Astrit ^a   Sivencrona, Håkan ^b   Bauer, Günther ^a   Torin, Jan ^c  

^a VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

^b SP TECHNICAL RESEARCH INSTITUTE OF SWEDEN   (Sweden)

^c CHALMERS UNIVERSITY OF TECHNOLOGY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

BUS TOPOLOGY; STAR TOPOLOGY; TIME-TRIGGERED PROTOCOLS (TTP);

ALGORITHMS; COMPUTER SOFTWARE; COMPUTER SYSTEM RECOVERY; ERROR DETECTION; FAULT TOLERANT COMPUTER SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS; HEAVY IONS; INTERFACES (COMPUTER); SOFTWARE ENGINEERING; SYNCHRONIZATION; SYSTEMS ANALYSIS; TIME DIVISION MULTIPLE ACCESS; TIMING CIRCUITS; TOPOLOGY; TRIGGER CIRCUITS;

COMPUTER ARCHITECTURE;

EID: 1542348516     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2003.1209924     Document Type: Conference Paper

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