New Techniques for the Identification of Defects in Multi-layer Flip-Chip Packages

Conference Proceedings from the International Symposium for Testing and Failure Analysis

Volumn , Issue , 2001, Pages 243-250

  Hsiung, Steve ^a   Tan, Kevan ^a   Luo, Joe ^a  

^a AGERE SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BALL GRID ARRAYS (BGA); CAPACITIVE COUPLING VOLTAGE CONTRAST (CCVC) IMAGES; FOCUSED ION BEAMS (FIB); PACKAGE SUBSTRATE PROBE FIXTURE (PSPF®);

CAPACITANCE; DEFECTS; ELECTRON BEAMS; FAILURE ANALYSIS; IMAGING TECHNIQUES; ION BEAMS; MULTILAYERS; SOLDERING; WAVEFORM ANALYSIS;

FLIP CHIP DEVICES;

EID: 1542330653     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. LSI Logic Flip-chip Plastic Ball Grid Array (FC-PBGA) Package Family Datasheet
2. S. Hsiung and V. Chan, ISTFA Proceedings 2000, pp.107-115
3. S. Hsiung and K. Tan, Document for US Patent Pending 5201-24300 01-120
4. A.N. Campbell, J.M. Soden, and J. Rife, ISTFA Proceedings 1995, pp. 33-41
5. P. Jacob and E. Doering, EUROPTO Conf. on Yield, Reliability, and Failure Analysis 1999, pp. 273-276
6. International Technology Roadmap for Semiconductors, Assembly and Packaging, 2000 update, p. 8