Minimizing stand-by leakage power in static CMOS circuits

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2001, Pages 370-376

  Naidu, Srinath R ^a   Jacobs, E T A F ^a  

^a EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS CIRCUITS; INPUT VECTOR; INTEGER LINEAR PROGRAMMING; LEAKAGE POWER; LOWER BOUNDS; POWER-LOSSES; STAND-BY LEAKAGE; SUB-THRESHOLD LEAKAGE CURRENTS;

CMOS INTEGRATED CIRCUITS; EXHIBITIONS; INTEGER PROGRAMMING; VECTORS;

LEAKAGE CURRENTS;

EID: 1542326846     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2001.915051     Document Type: Conference Paper

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