Neobit® - High reliable logic Non-volatile Memory (NVM)

Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA

Volumn , Issue , 2004, Pages 111-114

  Wang, Robert S C ^a   Shen, Rick S J ^a   Hsu, Charles C H ^a  

^a EMEMORY TECHNOLOGY INC   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); CODES (SYMBOLS); ELECTRIC CONDUCTIVITY; FLASH MEMORY; LOGIC CIRCUITS; LOGIC DEVICES; MICROCONTROLLERS; RELIABILITY; THERMIONIC EMISSION; VOLTAGE CONTROL;

CMOS PROCESS TECHNOLOGY; MULTIPLE-TIME PROGRAMMING (MTP); NON-VOLATILE MEMORY (NVM); ONE-TIME PROGRAMMING (OTP);

CMOS INTEGRATED CIRCUITS;

EID: 14844328031     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. Shoji Shukuri, Kazumasa Yanagisawa, and Koichiro Ishibashi, "CMOS Process Compatible ie-Flash (inverse gate electrode Flash) Technology for System-on-a Chip," IEEE Custom Integrated Circuits Conference, 2001, pp 179-182
2. Bob Carney, Elroy Lucero, Robi Mendel, and Herb Reiter, "Configurable EEPROMs for ASICs," IEEE Custom Integrated Circuits Conference, 1988, pp 4.2.1-4.2.4
3. Richard J. McPartland, and Ranbir Singh, "1.25Volt, Low Cost, Embedded FLASH Memory for Low Density Applications," Technical Digest of Symposium on VLSI Circuits, 2000, pp 158-161
4. Jun-ichi Miyamoto, Jun-ichi Tsujimoto, Naohiro Matsukawa, Shigeru Monta, Katsuyosi Shinada, Hiroshi Nazawa, and Tetsuya lizuka, "An Experimental 5-V-Only 256-kbit CMOS EEPROM with a High- Performance Single-Polysilicon Cell," IEEE J. of Solid-state Circuits, Vol. sc-21, October 1986, pp 852-860