Parallel time interleaved delta sigma band pass analog to digital converter for SOC applications

Proceedings - IEEE International SOC Conference

Volumn , Issue , 2004, Pages 45-48

  Ren, Saiyu ^a   Siferd, Ray ^a   Blumgold, Robert ^b  

^a Wright State University   (United States)

^b AIR FORCE RESEARCH LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DELTA SIGMA MODULATORS; MODULATOR QUANTIZERS; PARALLEL TIME INTERLEAVED (PTI); SYSTEM ON CHIP (SOC);

BANDPASS FILTERS; BANDWIDTH; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; FAST FOURIER TRANSFORMS; FREQUENCY MODULATION; JITTER; NYQUIST DIAGRAMS; SIGNAL TO NOISE RATIO;

ANALOG TO DIGITAL CONVERSION;

EID: 14844282086     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. W. C. Black, Jr. and D. A. Hodges, "Time Interleaved Converter Arrays", IEEE J. of Solid State Circuits, Vol. 15, pp. 1022-1029, Dec. 1980.
2. Raymond E. Siferd, U.S. Patent Number 6518905B2,"Parallel Time Interleaved Delta Sigma Modulator", Feb 11, 2003.
3. David A. Johns and Ken Martin, "Analog Integrated Circuit Design", John Wiley, 1997.
4. Michael Myers, Saiyu Ren, Mingzhen Wang, and Ray Siferd "Broadband Delta Sigma Modulator with 1 GHz Sampling Rate and 4 Bit Quantizer in 0.18um CMOS Technology" NASA Symposium on VLSI Design, Coeur d'Alene, Idaho, May, 2003.
5. Robert H. Walden, "Analog to Digital Converter Survey and Analysis", IEEE Journal on Selected Areas in Communications, Vol. 17, No. 4, April 1999.