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Volumn , Issue , 2004, Pages 80-83

An efficient all-digital built-in self-test for chargepump PLL

Author keywords

BIST; Mixed Signal Test; PLL

Indexed keywords

BOOLEAN ALGEBRA; COMPUTER SIMULATION; ELECTRIC IMPEDANCE; ERROR ANALYSIS; FEEDBACK; MICROPROCESSOR CHIPS; RELIABILITY; SIGNAL PROCESSING; SILICON;

EID: 14544271038     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (10)

References (9)
  • 6
    • 0032315580 scopus 로고    scopus 로고
    • Stimulus generation for built-in self-test of chargepump phase-locked loops
    • B. R. Veillette and G. W. Roberts, "Stimulus Generation for Built-in Self-Test of Chargepump Phase-Locked Loops," Proc. of IEEE Int. Test Conf, 1998, pp. 698-707.
    • (1998) Proc. of IEEE Int. Test Conf. , pp. 698-707
    • Veillette, B.R.1    Roberts, G.W.2
  • 7
    • 0033315398 scopus 로고    scopus 로고
    • BIST for phase-locked loops in digital applications
    • S. Sunter and A. Roy, "BIST for Phase-Locked Loops in Digital Applications," Proc. of IEEE Int. Test Conf. 1999, pp. 532-540.
    • (1999) Proc. of IEEE Int. Test Conf. , pp. 532-540
    • Sunter, S.1    Roy, A.2
  • 8
    • 0029755349 scopus 로고    scopus 로고
    • Challenges in analog and mixed-signal fault models
    • M. Soma, "Challenges in Analog and Mixed-Signal Fault Models," IEEE Circuits and Devices, 1996, pp. 16-19.
    • (1996) IEEE Circuits and Devices , pp. 16-19
    • Soma, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.