Rate analysis for embedded systems

ACM Transactions on Design Automation of Electronic Systems

Volumn 3, Issue 3, 1998, Pages 408-436

  Mathur, Anmol ^a,c   Dasdan, Ali ^b,c   Gupta, Rajesh K ^d,e  

^a HEWLETT PACKARD ENTERPRISE   (United States)

^b UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

^d CADENCE DESIGN SYSTEMS   (United States)

^e University of Illinois at Urbana Champaign   (United States)

Author keywords

Algorithms; Average execution rate; Concurrent system modeling; Design; Embedded systems; Interactive rate violation debugging; Performance; Rate analysis; Rate constraints; Theory

Indexed keywords

EID: 14244256365     PISSN: 10844309     EISSN: None     Source Type: Journal    
DOI: 10.1145/293625.293631     Document Type: Article

References (13)

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