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Volumn 2003-January, Issue , 2003, Pages 302-304

Real-time extensions to a C-like hardware description language

Author keywords

Aerospace control; Aircraft; Application software; Clocks; Delay effects; Educational institutions; Field programmable gate arrays; Hardware design languages; Real time systems; Timing

Indexed keywords

AIRCRAFT; APPLICATION PROGRAMS; CLOCKS; COMPUTATIONAL LINGUISTICS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; INTERACTIVE COMPUTER SYSTEMS; REAL TIME SYSTEMS;

EID: 13944279792     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2003.1227281     Document Type: Conference Paper
Times cited : (2)

References (6)
  • 3
    • 53349130831 scopus 로고
    • Structured Hardware Compilation of Parallel Programs
    • W. Luk, W. Moore (eds), Abingdon EE&CS Books
    • W. Luk, D. Ferguson, I. Page, "Structured Hardware Compilation of Parallel Programs", inW. Luk, W. Moore (eds), More FPGAs, Abingdon EE&CS Books, 1993.
    • (1993) More FPGAs
    • Luk, W.1    Ferguson, D.2    Page, I.3
  • 5
    • 5644253053 scopus 로고    scopus 로고
    • Hardware Implementation of the Ravenscar Tasking Profile
    • M. Ward and N.C. Audsley, "Hardware Implementation of the Ravenscar Tasking Profile", in Proceedings of CASES 2002, 2002.
    • (2002) Proceedings of CASES 2002
    • Ward, M.1    Audsley, N.C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.