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Volumn , Issue , 2004, Pages 227-233

Analysis and hardware design of a scalable dual JPEG-2000 entropy coder

Author keywords

[No Author keywords available]

Indexed keywords

ENTROPY CODERS; JPEG-2000; SPATIAL DECORRELATION; WAVELET COEFFICIENTS;

EID: 13944273022     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2004.1333281     Document Type: Conference Paper
Times cited : (1)

References (23)
  • 2
    • 0344859490 scopus 로고    scopus 로고
    • V.1.500.4, ISO/IEC JTC1/SC29/WG1 (ITU-T SG8) N2415, Dec.
    • M.D.Adams, "Jasper Software Reference Manual", V.1.500.4, ISO/IEC JTC1/SC29/WG1 (ITU-T SG8) N2415, Dec. 2001.
    • (2001) Jasper Software Reference Manual
    • Adams, M.D.1
  • 4
    • 27944487264 scopus 로고    scopus 로고
    • Microarchitectural characterization of JPEG-2000 software
    • Signals and Image Processing 7-8 November, Manchester, UK.
    • th International Workshop on Systems, Signals and Image Processing 7-8 November 2002, Manchester, UK.
    • (2002) th International Workshop on Systems
    • Aouadi, I.1    Hammami, O.2
  • 8
    • 84860082672 scopus 로고    scopus 로고
    • http://www.xilinx.com
  • 9
    • 84860089896 scopus 로고    scopus 로고
    • Celoxica http://www.celoxica.com
  • 14
    • 13944263486 scopus 로고    scopus 로고
    • School of Computer Carleton University Ottawa, Canada K1S 5B6 Ottawa April 12
    • Yue Bao, Xinrong Huang, Hua Ye, "JPEG2000 Parallel Implementation", School of Computer Carleton University Ottawa, Canada K1S 5B6 Ottawa April 12, 2003.
    • (2003) JPEG2000 Parallel Implementation
    • Bao, Y.1    Huang, X.2    Ye, H.3
  • 18
    • 0035248162 scopus 로고    scopus 로고
    • Multimedia processor-based implementation of an error diffusion halftoning algorithm exploiting subword parallelism
    • Feb.
    • J.Ahn and W.sung, "Multimedia Processor-Based Implementation of an Error Diffusion Halftoning Algorithm Exploiting Subword Parallelism", pp.129-138, IEEE Trans. on Circuits and Systems for Video Technology, Vol.11, No.2, Feb. 2001.
    • (2001) IEEE Trans. on Circuits and Systems for Video Technology , vol.11 , Issue.2 , pp. 129-138
    • Ahn, J.1    Sung, W.2
  • 19
    • 0035505586 scopus 로고    scopus 로고
    • An 80/20-Mhz 160-mW multimedia processor integrated with embedded DRAM, MPEG-4 accelerator, and 3D rendering engine for mobile applications
    • Nov.
    • C.Yoon, R.Woo, J.Kook and al., " An 80/20-Mhz 160-mW Multimedia Processor Integrated With Embedded DRAM, MPEG-4 Accelerator, and 3D Rendering Engine for Mobile Applications", pp. 1758-1767, Vol.36, No.11, IEEE Journal of Solid-State Circuits, Nov.2001.
    • (2001) IEEE Journal of Solid-State Circuits , vol.36 , Issue.11 , pp. 1758-1767
    • Yoon, C.1    Woo, R.2    Kook, J.3
  • 20
    • 0035506737 scopus 로고    scopus 로고
    • A 250-Mhz single-chip multiprocessor for audio and video signal processing
    • Nov.
    • T.Koyama, K.Inoue, H.Hanaki, M.Yasue and E.Iwata, "A 250-Mhz Single-Chip Multiprocessor for Audio and Video Signal Processing", pp. 1768-1774, Vol.36, No.11, IEEE Journal of Solid-State Circuits, Nov.2001.
    • (2001) IEEE Journal of Solid-State Circuits , vol.36 , Issue.11 , pp. 1768-1774
    • Koyama, T.1    Inoue, K.2    Hanaki, H.3    Yasue, M.4    Iwata, E.5
  • 21
    • 0036110783 scopus 로고    scopus 로고
    • An 8-way VLIW embedded multimedia processor built in a 7-layer metal 0.11 urn CMOS technology
    • San Francisco, Feb.
    • H.Okano and al.,"An 8-way VLIW Embedded Multimedia Processor Built in a 7-layer Metal 0.11 urn CMOS Technology", IEEE International Solid-state Circuits Conference, San Francisco, Feb.2002.
    • (2002) IEEE International Solid-state Circuits Conference
    • Okano, H.1
  • 23
    • 84860089897 scopus 로고    scopus 로고
    • http://www.xilinx.com/ipcenter/catalog/logicore/docs/ microblaze_risc_32bit_proc_final.pdf


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.