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Volumn , Issue , 2004, Pages 80-87

A novel signed higher-radix full-adder algorithm and implementation with current-mode multi-valued logic circuits

Author keywords

[No Author keywords available]

Indexed keywords

CYCLIC OPERATORS; HIGHER-RADIX COMPUTATION; MULTI-VALUED LOGIC CIRCUITS; VOLTAGE-MODE SWITCHING CIRCUITS;

EID: 13944265608     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2004.1333261     Document Type: Conference Paper
Times cited : (7)

References (12)
  • 2
    • 0019612639 scopus 로고
    • Representation of multivalued functi ons using the direct cover method
    • September
    • Pomper, G. and Armstrong, J. R., "Representation of Multivalued Functi [3] ons Using the Direct Cover Method", IEEE Transactions on Computers, Vol. C-30, pp. 221-226, September, 1981.
    • (1981) IEEE Transactions on Computers , vol.C-30 , pp. 221-226
    • Pomper, G.1    Armstrong, J.R.2
  • 3
    • 0032669237 scopus 로고    scopus 로고
    • A new high-radix maximally-redundant signed digit adder
    • May-June
    • Mekhallalati, M.C., and Ibrahim, M.K., "A new high-radix maximally-redundant signed digit adder", Proceedings of ISCAS'99, vol:1, pp. 459-462, May-June 1999.
    • (1999) Proceedings of ISCAS'99 , vol.1 , pp. 459-462
    • Mekhallalati, M.C.1    Ibrahim, M.K.2
  • 4
    • 0014868235 scopus 로고
    • A many-valued algebra for switching systems
    • October
    • Vranesic, Z. G., Lee, E. S. and Smith, K. C., "A Many-valued Algebra for Switching Systems", IEEE Transactions on Computers, Vol. C-19, pp. 964-971, October 1970.
    • (1970) IEEE Transactions on Computers , vol.C-19 , pp. 964-971
    • Vranesic, Z.G.1    Lee, E.S.2    Smith, K.C.3
  • 5
    • 0026923453 scopus 로고
    • Methods for detection of some properties of multiple-valued functions
    • September
    • Stankovic, R. S., and Muroga, C., "Methods for Detection of Some Properties of Multiple-valued Functions", IEE Proceedings, Vol. 139, Part E, No. 3, pp. 421-429, September, 1992.
    • (1992) IEE Proceedings , vol.139 , Issue.3 PART E , pp. 421-429
    • Stankovic, R.S.1    Muroga, C.2
  • 6
    • 0003524553 scopus 로고
    • A minimization technique for multi-valued logic systems
    • February
    • Alen, C. M. and Givone, D. D., "A Minimization Technique for Multi-valued Logic Systems", IEEE Transactions on Computers, Vol. C-17, pp. 182-184, February, 1968.
    • (1968) IEEE Transactions on Computers , vol.C-17 , pp. 182-184
    • Alen, C.M.1    Givone, D.D.2
  • 8
    • 3543105429 scopus 로고    scopus 로고
    • Implementation of multi-valued logic gates using full current-mode CMOS circuits
    • KAP
    • Temel, T., and A. Morgül, "Implementation of Multi-valued Logic Gates Using Full Current-mode CMOS Circuits", Analog Integrated Circuits and Signal Processing, KAP, Vol. 39, No. 2, pp. 191-204, 2004
    • (2004) Analog Integrated Circuits and Signal Processing , vol.39 , Issue.2 , pp. 191-204
    • Temel, T.1    Morgül, A.2
  • 10
    • 4344574144 scopus 로고    scopus 로고
    • A new level restoration circuit for multi-valued logic
    • May , Vancouver, CA.
    • Morgul, A., and Temel, Turgay, "A New Level Restoration Circuit for Multi-valued Logic", Proceedings of IEEE-ISCAS'04, pp-649-652, May 2004, Vancouver, CA.
    • (2004) Proceedings of IEEE-ISCAS'04 , pp. 649-652
    • Morgul, A.1    Temel, T.2
  • 11
    • 0021445655 scopus 로고
    • The design of high performance analog circuits on digital CMOS chips
    • June
    • Vittoz, E. A.,"The Design of High Performance Analog Circuits on Digital CMOS chips", IEEE Journal of Solid-State Circuits, Vol. SC-20, No. 3, pp. 657-665, June, 1985.
    • (1985) IEEE Journal of Solid-state Circuits , vol.SC-20 , Issue.3 , pp. 657-665
    • Vittoz, E.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.