Study of the step coverage and contact resistance by using two-step TiN barrier and evolve simulation

IEEE Transactions on Semiconductor Manufacturing

Volumn 18, Issue 1, 2005, Pages 163-172

  Sidhwa, Ardeshir ^a   Spinner, Chuck ^a   Gandy, Todd ^a   Goulding, Mike ^a   Brown, William ^b   Naseem, Hameed ^b   Ulrich, Richard ^b   Ang, Simon ^b   Charlton, Sherwood ^b   Prasad, Vinay ^c   Cale, Timothy ^c  

^a STMICROELECTRONICS   (Italy)

^b UNIVERSITY OF ARKANSAS   (United States)

^c RENSSELAER POLYTECHNIC INSTITUTE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ASPECT RATIO; CHEMICAL VAPOR DEPOSITION; COMPUTER SIMULATION; ELECTRIC RESISTANCE; INTEGRATED CIRCUIT MANUFACTURE; LEAKAGE CURRENTS; METALLIZING; MICROELECTRONICS; PHYSICAL VAPOR DEPOSITION; SCANNING ELECTRON MICROSCOPY; SPUTTERING; TRANSMISSION ELECTRON MICROSCOPY; VLSI CIRCUITS;

BARRIER FILMS; CONTACT RESISTANCE; FOCUSED ION BEAMS (FIB); WORMHOLES;

TITANIUM NITRIDE;

EID: 13844267599     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/TSM.2004.840524     Document Type: Article

References (13)

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