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Volumn 26, Issue 2, 2005, Pages 121-123

A new low-parasitic polysilicon SCR ESD protection structure for RF ICs

Author keywords

Electrostatic discharge; Electrostatic discharge (ESD) protection; F factor; Low parasitic; RF; Silicon controlled rectifier (SCR)

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTROSTATICS; POLYSILICON; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DIODES;

EID: 13444280428     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2004.841860     Document Type: Article
Times cited : (30)

References (9)
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  • 3
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  • 4
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    • "Investigation on different ESD protection strategies devoted to 3.3 V RF applications (2 GHz) in a 0.18 μm CMOS process"
    • C. Richier, "Investigation on different ESD protection strategies devoted to 3.3 V RF applications (2 GHz) in a 0.18 μm CMOS process," in Proc. EOS/ESD Symp., 2000, pp. 251-259.
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    • Richier, C.1
  • 5
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    • May
    • G. Chen, "Characterizing diodes for RF ESD protection," IEEE Electron Device Lett., vol. 25, no. 5, pp. 323-325, May 2004.
    • (2004) IEEE Electron Device Lett. , vol.25 , Issue.5 , pp. 323-325
    • Chen, G.1
  • 6
    • 0034854567 scopus 로고    scopus 로고
    • "On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS process"
    • C. Chang, "On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS process," Proc. VLSI Tech. Dig., pp. 240-243, 2001
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    • Chang, C.1
  • 8
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  • 9
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    • "RF characterization of ESD protection structures"
    • G. Chen, "RF characterization of ESD protection structures," in Proc. IEEE RFIC Symp., 2004, pp. 379-382.
    • (2004) Proc. IEEE RFIC Symp. , pp. 379-382
    • Chen, G.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.