-
4
-
-
0028444931
-
"Noise in digital dynamic CMOS circuits"
-
Jun
-
P. Larsson and C. Svensson, "Noise in digital dynamic CMOS circuits," IEEE J. Solid-State Circuits, vol. 29, no. 6, pp. 655-662, Jun. 1994.
-
(1994)
IEEE J. Solid-State Circuits
, vol.29
, Issue.6
, pp. 655-662
-
-
Larsson, P.1
Svensson, C.2
-
6
-
-
0032679023
-
"Digital logic gate using quantum-dot cellular automata"
-
Apr
-
I. Amlani, A. O. Orlov, G. Toth, G. H. Bernstein, C. S. Lent, and G. L. Snider, "Digital logic gate using quantum-dot cellular automata," Science, vol. 284, Apr. 1999.
-
(1999)
Science
, vol.284
-
-
Amlani, I.1
Orlov, A.O.2
Toth, G.3
Bernstein, G.H.4
Lent, C.S.5
Snider, G.L.6
-
7
-
-
0037215761
-
"Non-concurrent error detection and correction in discrete-time LTI dynamic systems"
-
Jan
-
C. N. Hadjicostis, "Non-concurrent error detection and correction in discrete-time LTI dynamic systems," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 50, no. 1, pp. 45-55, Jan. 2003.
-
(2003)
IEEE Trans. Circuits Syst. I, Reg. Papers
, vol.50
, Issue.1
, pp. 45-55
-
-
Hadjicostis, C.N.1
-
8
-
-
0347947000
-
"Non-concurrent error detection and correction in fault-tolerant linear finite state machines"
-
Dec
-
C. N. Hadjicotis, "Non-concurrent error detection and correction in fault-tolerant linear finite state machines," IEEE Trans. Autom. Control, vol. 48, no. 12, pp. 2133-2140, Dec. 2003.
-
(2003)
IEEE Trans. Autom. Control
, vol.48
, Issue.12
, pp. 2133-2140
-
-
Hadjicotis, C.N.1
-
9
-
-
3843118729
-
"Periodic and nonconcurrent error detection and identification in one-hot encoded fsms"
-
to be published
-
C. N. Hadjicostis, "Periodic and nonconcurrent error detection and identification in one-hot encoded fsms," Automatica, to be published.
-
Automatica
-
-
Hadjicostis, C.N.1
-
13
-
-
0021439162
-
"Algorithm-based fault tolerance for matrix operations"
-
Jun
-
K.-H. Huang and J. A. Abraham, "Algorithm-based fault tolerance for matrix operations," IEEE Trans. Comput., vol. C-33, no. 6, pp. 518-528, Jun. 1984.
-
(1984)
IEEE Trans. Comput.
, vol.C-33
, Issue.6
, pp. 518-528
-
-
Huang, K.-H.1
Abraham, J.A.2
-
14
-
-
0022721936
-
"Fault-tolerant matrix arithmetic and signal processing on highly concurrent parallel structures"
-
May
-
J.-Y. Jou and J. A. Abraham, "Fault-tolerant matrix arithmetic and signal processing on highly concurrent parallel structures," Proc. IEEE, vol. 74. no. 5, pp. 732-741, May 1986.
-
(1986)
Proc. IEEE
, vol.74
, Issue.5
, pp. 732-741
-
-
Jou, J.-Y.1
Abraham, J.A.2
-
15
-
-
0024016403
-
"Fault-tolerant FFT networks"
-
May
-
J.-Y. Jou, and J. A. Abraham, "Fault-tolerant FFT networks," IEEE Trans. Comput., vol. 37, no. 5, pp. 548-561, May 1988.
-
(1988)
IEEE Trans. Comput.
, vol.37
, Issue.5
, pp. 548-561
-
-
Jou, J.-Y.1
Abraham, J.A.2
-
16
-
-
0025416576
-
"Real-number codes for fault-tolerant matrix operations on processor arrays"
-
Apr
-
V. S. S. Nair and J. A. Abraham, "Real-number codes for fault-tolerant matrix operations on processor arrays," IEEE Trans. Comput., vol. 39, no. 4, pp. 426-435, Apr. 1990.
-
(1990)
IEEE Trans. Comput.
, vol.39
, Issue.4
, pp. 426-435
-
-
Nair, V.S.S.1
Abraham, J.A.2
-
17
-
-
0026385166
-
"Fault-tolerant round-robin A/D converter system"
-
Dec
-
P. E. Beckmann and B. R. Musicus, "Fault-tolerant round-robin A/D converter system," IEEE Trans. Circuits Syst., vol. 38, no. 12, pp. 1420-1429, Dec. 1991.
-
(1991)
IEEE Trans. Circuits Syst.
, vol.38
, Issue.12
, pp. 1420-1429
-
-
Beckmann, P.E.1
Musicus, B.R.2
-
18
-
-
0027629366
-
"Fast fault-tolerant digital convolution using a polynomial residue number system"
-
Jul
-
P. E. Beckmann, and B. R. Musicus, "Fast fault-tolerant digital convolution using a polynomial residue number system," IEEE Trans. Signal Process., vol. 41, no. 7, pp. 2300-2313, Jul. 1993.
-
(1993)
IEEE Trans. Signal Process.
, vol.41
, Issue.7
, pp. 2300-2313
-
-
Beckmann, P.E.1
Musicus, B.R.2
-
19
-
-
0027647426
-
"Synthesis of algorithm-based fault-tolerant systems from dependence graphs"
-
Aug
-
B. Vinnakota and N. K. Jha, "Synthesis of algorithm-based fault-tolerant systems from dependence graphs," IEEE Trans. Parallel Distrib. Syst., vol. 4, no. 8, pp. 864-874, Aug. 1993.
-
(1993)
IEEE Trans. Parallel Distrib. Syst.
, vol.4
, Issue.8
, pp. 864-874
-
-
Vinnakota, B.1
Jha, N.K.2
-
20
-
-
0030286802
-
"Algorithm-based fault location and recovery for matrix computations on multiprocessor systems"
-
Nov
-
A. Roy-Chowdhury and P. Banerjee, "Algorithm-based fault location and recovery for matrix computations on multiprocessor systems," IEEE Trans. Comput., vol. 45, no. 11, pp. 1239-1247, Nov. 1996.
-
(1996)
IEEE Trans. Comput.
, vol.45
, Issue.11
, pp. 1239-1247
-
-
Roy-Chowdhury, A.1
Banerjee, P.2
-
21
-
-
0000564198
-
"Algorithm-based fault tolerant synthesis for linear operations"
-
Apr
-
J.-L. Sung and G. R. Redinbo, "Algorithm-based fault tolerant synthesis for linear operations," IEEE Trans. Comput., vol. 45, no. 4, pp. 425-437, Apr. 1996.
-
(1996)
IEEE Trans. Comput.
, vol.45
, Issue.4
, pp. 425-437
-
-
Sung, J.-L.1
Redinbo, G.R.2
-
22
-
-
0003486498
-
"Fault-tolerant computation using algebraic homomorphisms"
-
Ph.D. dissertation, Elec. Eng. Comput Sci. Dept., MIT, Cambridge, MA
-
P. E. Beckmann, "Fault-tolerant computation using algebraic homomorphisms," Ph.D. dissertation, Elec. Eng. Comput Sci. Dept., MIT, Cambridge, MA, 1992.
-
(1992)
-
-
Beckmann, P.E.1
-
23
-
-
0002506255
-
"A group-theoretic framework for fault-tolerant computation"
-
P. E. Beckmann and B. R. Musicus, "A group-theoretic framework for fault-tolerant computation," in Proc. IEEE Int. Conf. Acoustics, Speech, and Signal Processing (ICASSP 1992), vol. 5, 1992, pp. 557-560.
-
(1992)
Proc. IEEE Int. Conf. Acoustics, Speech, and Signal Processing (ICASSP 1992)
, vol.5
, pp. 557-560
-
-
Beckmann, P.E.1
Musicus, B.R.2
-
24
-
-
0003605635
-
"Fault-tolerant computation in semigroups and semirings"
-
M. Eng. thesis, Elec. Eng. Comput. Sci. Dept., MIT, Cambridge, MA
-
C. N. Hadjicostis, "Fault-tolerant computation in semigroups and semirings," M. Eng. thesis, Elec. Eng. Comput. Sci. Dept., MIT, Cambridge, MA, 1995.
-
(1995)
-
-
Hadjicostis, C.N.1
-
25
-
-
0009363587
-
"Fault-tolerant computation in semigroups and semirings"
-
Limassol, Cypuss, Jun
-
C. N. Hadjicostis and G. C. Verghese, "Fault-tolerant computation in semigroups and semirings," in Proc. Int. Conf. Digital Signal Processing, Limassol, Cypuss, Jun. 1995, pp. 779-784.
-
(1995)
Proc. Int. Conf. Digital Signal Processing
, pp. 779-784
-
-
Hadjicostis, C.N.1
Verghese, G.C.2
-
26
-
-
2442533432
-
"Computation in the presence of noise"
-
Oct
-
P. Elias, "Computation in the presence of noise," IBM J. Res. Devel., vol. 2, no. 10, pp. 346-353, Oct. 1958.
-
(1958)
IBM J. Res. Devel.
, vol.2
, Issue.10
, pp. 346-353
-
-
Elias, P.1
-
28
-
-
0023979062
-
"Reliable computation by formulas in the presence of noise"
-
Mar
-
N. Pippenger, "Reliable computation by formulas in the presence of noise," IEEE Trans. Inf. Theory, vol. 34, no. 2, pp. 194-197, Mar. 1988.
-
(1988)
IEEE Trans. Inf. Theory
, vol.34
, Issue.2
, pp. 194-197
-
-
Pippenger, N.1
-
29
-
-
0024668316
-
"Reliable computation by networks in the presence of noise"
-
May
-
T. Feder, "Reliable computation by networks in the presence of noise," IEEE Trans. Inf. Theory, vol. 35, no. 3, pp. 569-571, May 1989.
-
(1989)
IEEE Trans. Inf. Theory
, vol.35
, Issue.3
, pp. 569-571
-
-
Feder, T.1
-
30
-
-
0026121386
-
"On the maximum tolerable noise for reliable computation by formulas"
-
Mar
-
B. Hajek and T. Weller, "On the maximum tolerable noise for reliable computation by formulas," IEEE Trans. Inf. Theory, vol. 37, no. 2, pp. 388-391, Mar. 1991.
-
(1991)
IEEE Trans. Inf. Theory
, vol.37
, Issue.2
, pp. 388-391
-
-
Hajek, B.1
Weller, T.2
-
31
-
-
0028386953
-
"Lower bounds on the complexity of reliable Boolean circuits with noisy gates"
-
Mar
-
P. Gács and A. Gál, "Lower bounds on the complexity of reliable Boolean circuits with noisy gates," IEEE Trans. Inf. Theory, vol. 40, no. 2, pp. 579-583, Mar. 1994.
-
(1994)
IEEE Trans. Inf. Theory
, vol.40
, Issue.2
, pp. 579-583
-
-
Gács, P.1
Gál, A.2
-
32
-
-
0032070548
-
"On the maximum tolerable noise for reliable computation by formulas"
-
May
-
W. Evans and N. Pippenger, "On the maximum tolerable noise for reliable computation by formulas," IEEE Trans. Inf. Theory, vol. 44, no. 3, pp. 1299-1305, May 1998.
-
(1998)
IEEE Trans. Inf. Theory
, vol.44
, Issue.3
, pp. 1299-1305
-
-
Evans, W.1
Pippenger, N.2
-
33
-
-
0033340682
-
"Signal propagation and noisy circuits"
-
Nov
-
W. Evans and L. J. Schulman, "Signal propagation and noisy circuits," IEEE Trans. Inf. Theory, vol. 45, no. 7, pp. 2367-2373, Nov. 1999.
-
(1999)
IEEE Trans. Inf. Theory
, vol.45
, Issue.7
, pp. 2367-2373
-
-
Evans, W.1
Schulman, L.J.2
-
34
-
-
0039830178
-
"Developments in the synthesis of reliable organisms from unreliable components"
-
N. Pippenger, "Developments in the synthesis of reliable organisms from unreliable components," in Proc. Symp. Pure Mathematics, vol. 50, 1990, pp. 311-324.
-
(1990)
Proc. Symp. Pure Mathematics
, vol.50
, pp. 311-324
-
-
Pippenger, N.1
-
35
-
-
84944813329
-
"Reliable information storage in memories designed from unreliable components"
-
Dec
-
M. G. Taylor, "Reliable information storage in memories designed from unreliable components," Bell Syst. Tech. J., vol. 47, no. 10, pp. 2299-2337, Dec. 1968.
-
(1968)
Bell Syst. Tech. J.
, vol.47
, Issue.10
, pp. 2299-2337
-
-
Taylor, M.G.1
-
36
-
-
84944817773
-
"Reliable computation in computing systems designed from unreliable components"
-
Dec
-
M. G. Taylor, "Reliable computation in computing systems designed from unreliable components," Bell Syst. Tech. J., vol. 47, no. 10, pp. 2239-2366, Dec. 1968.
-
(1968)
Bell Syst. Tech. J.
, vol.47
, Issue.10
, pp. 2239-2366
-
-
Taylor, M.G.1
-
37
-
-
0009050701
-
"Coding techniques for failure-tolerant counters"
-
Nov
-
I. S. Reed and A. C. L. Chiang, "Coding techniques for failure-tolerant counters," IEEE Trans. Comput., vol. C-19, pp. 1035-1038, Nov. 1970.
-
(1970)
IEEE Trans. Comput.
, vol.C-19
, pp. 1035-1038
-
-
Reed, I.S.1
Chiang, A.C.L.2
-
38
-
-
0015300012
-
"Redundancy by coding versus redundancy by replication for failure-tolerant sequential circuits"
-
Feb
-
R. W. Larsen and I. S. Reed, "Redundancy by coding versus redundancy by replication for failure-tolerant sequential circuits," IEEE Trans. Comput., vol. C-21, no. 2, pp. 130-137, Feb. 1972.
-
(1972)
IEEE Trans. Comput.
, vol.C-21
, Issue.2
, pp. 130-137
-
-
Larsen, R.W.1
Reed, I.S.2
-
39
-
-
0021385978
-
"Probability of state transition errors in a finite state machine containing soft failures"
-
Mar
-
G. X. Wang and G. R. Redinbo, "Probability of state transition errors in a finite state machine containing soft failures," IEEE Trans. Comput., vol. C-33, no. 3, pp. 269-277, Mar. 1984.
-
(1984)
IEEE Trans. Comput.
, vol.C-33
, Issue.3
, pp. 269-277
-
-
Wang, G.X.1
Redinbo, G.R.2
-
40
-
-
0022663843
-
"Reliable computation with cellular automata"
-
Feb
-
P. Gács, "Reliable computation with cellular automata," J. Comput. Syst. Sci., vol. 32, no. 2, pp. 15-78, Feb. 1986.
-
(1986)
J. Comput. Syst. Sci.
, vol.32
, Issue.2
, pp. 15-78
-
-
Gács, P.1
-
42
-
-
0019710247
-
"Fault-tolerance by means of external monitoring of computer systems"
-
A. Avizienis, "Fault-tolerance by means of external monitoring of computer systems," in Proc. 1981 Nat. Computational Conf., 1981, pp. 27-40.
-
(1981)
Proc. 1981 Nat. Computational Conf.
, pp. 27-40
-
-
Avizienis, A.1
-
43
-
-
0028741685
-
"The Hyeti defect tolerant microprocessor: A practical experiment and its cost-effectiveness analysis"
-
Dec
-
R. Leveugle, Z. Koren, I. Koren, G. Saucier, and N. Wehn, "The Hyeti defect tolerant microprocessor: A practical experiment and its cost-effectiveness analysis," IEEE Trans. Comput., vol. 43, no. 12, pp. 1398-1406, Dec. 1994.
-
(1994)
IEEE Trans. Comput.
, vol.43
, Issue.12
, pp. 1398-1406
-
-
Leveugle, R.1
Koren, Z.2
Koren, I.3
Saucier, G.4
Wehn, N.5
-
44
-
-
0015050317
-
"Failure-tolerant sequential machines with past information"
-
Apr
-
Y. Tohma and S. Aoyagi, "Failure-tolerant sequential machines with past information," IEEE Trans. Comput., vol. C-20, no. 4, pp. 392-396, Apr. 1971.
-
(1971)
IEEE Trans. Comput.
, vol.C-20
, Issue.4
, pp. 392-396
-
-
Tohma, Y.1
Aoyagi, S.2
-
45
-
-
0022700796
-
"(N, K) concept fault tolerance"
-
Apr
-
T. Krol, "(N, K) concept fault tolerance," IEEE Trans. Comput., vol. C-35, no. 4, pp. 339-349, Apr. 1986.
-
(1986)
IEEE Trans. Comput.
, vol.C-35
, Issue.4
, pp. 339-349
-
-
Krol, T.1
-
46
-
-
0022118980
-
"Concurrent fault detection in microprogrammed control units"
-
Sept
-
V. S. Iyengar and L. L. Kinney, "Concurrent fault detection in microprogrammed control units," IEEE Trans. Comput., vol. C-34, no. 9, pp. 810-821, Sept. 1985.
-
(1985)
IEEE Trans. Comput.
, vol.C-34
, Issue.9
, pp. 810-821
-
-
Iyengar, V.S.1
Kinney, L.L.2
-
47
-
-
0025414885
-
"Optimized synthesis of concurrently checked controllers"
-
Apr
-
R. Leveugle and G. Saucier, "Optimized synthesis of concurrently checked controllers," IEEE Trans. Comput., vol. 39, no. 4, pp. 419-425, Apr. 1990.
-
(1990)
IEEE Trans. Comput.
, vol.39
, Issue.4
, pp. 419-425
-
-
Leveugle, R.1
Saucier, G.2
-
48
-
-
0026618753
-
"A methodology for designing optimal self-checking sequential circuits"
-
Piscataway, NJ
-
R. A. Parekhji, G. Venkatesh, and S. D. Sherlekar, "A methodology for designing optimal self-checking sequential circuits," in Proc. Int. Conf. VLSI Design, Piscataway, NJ, 1991, pp. 283-291.
-
(1991)
Proc. Int. Conf. VLSI Design
, pp. 283-291
-
-
Parekhji, R.A.1
Venkatesh, G.2
Sherlekar, S.D.3
-
50
-
-
0029379286
-
"Concurrent error detection using monitoring machines"
-
R. A. Parekhji, G. Venkatesh, and S. D. Sherlekar, "Concurrent error detection using monitoring machines," IEEE Des. Test Comput., vol. 12, no. 3, pp. 24-32, 1995.
-
(1995)
IEEE Des. Test Comput.
, vol.12
, Issue.3
, pp. 24-32
-
-
Parekhji, R.A.1
Venkatesh, G.2
Sherlekar, S.D.3
-
52
-
-
0026618762
-
"Concurrent error detection for restricted fault sets in sequential circuits and microprogrammed control units using convolutional codes"
-
L. P. Holmquist, and L. L. Kinney, "Concurrent error detection for restricted fault sets in sequential circuits and microprogrammed control units using convolutional codes," in Proc. Int. Test Conf., 1991, pp. 926-935.
-
(1991)
Proc. Int. Test Conf.
, pp. 926-935
-
-
Holmquist, L.P.1
Kinney, L.L.2
-
53
-
-
1542289783
-
"Finite-state machine embeddings for nonconcurrent error detection and identification"
-
Mani, HI, Dec
-
C. N. Hadjicostis, "Finite-state machine embeddings for nonconcurrent error detection and identification," in Proc. 42nd IEEE Conf. Decision and Control (CDC 2003), vol. 4, Mani, HI, Dec. 2003, pp. 3215-3220.
-
(2003)
Proc. 42nd IEEE Conf. Decision and Control (CDC 2003)
, vol.4
, pp. 3215-3220
-
-
Hadjicostis, C.N.1
-
56
-
-
0004068527
-
"Coding approaches to fault tolerance in dynamic systems"
-
Ph.D. dissertation, Elec. Eng. Comput. Sci. Dept., MIT, Cambridge, MA
-
C. N. Hadjicostis, "Coding approaches to fault tolerance in dynamic systems," Ph.D. dissertation, Elec. Eng. Comput. Sci. Dept., MIT, Cambridge, MA, 1999.
-
(1999)
-
-
Hadjicostis, C.N.1
-
57
-
-
0036655431
-
"Fault-tolerant computation in groups and semigroups"
-
Jul.-Aug
-
C. N. Hadjicostis and G. C. Verghese, "Fault-tolerant computation in groups and semigroups," J. Franklin Inst., vol. 339, no. 4-5, pp. 387-430, Jul.-Aug. 2002.
-
(2002)
J. Franklin Inst.
, vol.339
, Issue.4-5
, pp. 387-430
-
-
Hadjicostis, C.N.1
Verghese, G.C.2
-
58
-
-
0033478794
-
"Structured redundancy for fault tolerance in LTI state-space models and Petri nets"
-
Jan
-
C. N. Hadjicostis, and G. C. Verghese, "Structured redundancy for fault tolerance in LTI state-space models and Petri nets," Kybernetika, vol. 35, no. 1, pp. 39-55, Jan. 1999.
-
(1999)
Kybernetika
, vol.35
, Issue.1
, pp. 39-55
-
-
Hadjicostis, C.N.1
Verghese, G.C.2
-
59
-
-
0035709209
-
"Non-concurrent error detection and Correction in discrete-time LTI dynamic systems"
-
Orlando, FL, Dec. 4-7
-
C. N. Hadjicostis, "Non-concurrent error detection and Correction in discrete-time LTI dynamic systems," in Proc. 40th IEEE Conf. Decision and Control (CDC 2001), vol. 2, Orlando, FL, Dec. 4-7, 2001, pp. 1899-1904.
-
(2001)
Proc. 40th IEEE Conf. Decision and Control (CDC 2001)
, vol.2
, pp. 1899-1904
-
-
Hadjicostis, C.N.1
-
60
-
-
0036253420
-
"Encoded dynamics for fault tolerance in linear finite-state machines"
-
Jan
-
C. N. Hadjicostis and G. C. Verghese, "Encoded dynamics for fault tolerance in linear finite-state machines," IEEE Trans. Autom. Control, vol. i 47, no. 1, pp. 189-192, Jan. 2002.
-
(2002)
IEEE Trans. Autom. Control
, vol.47
, Issue.1
, pp. 189-192
-
-
Hadjicostis, C.N.1
Verghese, G.C.2
-
61
-
-
0000182415
-
"A measure of asymptotic efficiency for tests of hypothesis based on the sum of observations"
-
Dec
-
H. Chernoff, ,A measure of asymptotic efficiency for tests of hypothesis based on the sum of observations," Ann. Math. Statist., vol. 23, no. 4, pp. 493-507, Dec. 1952.
-
(1952)
Ann. Math. Statist.
, vol.23
, Issue.4
, pp. 493-507
-
-
Chernoff, H.1
-
62
-
-
0000789645
-
"Explicit construction of concentrators"
-
Oct.-Dec
-
G. A. Margulis, "Explicit construction of concentrators," Probl. Inf. Transm., vol. 9, no. 5, pp. 71-80, Oct.-Dec. 1974.
-
(1974)
Probl. Inf. Transm.
, vol.9
, Issue.5
, pp. 71-80
-
-
Margulis, G.A.1
-
65
-
-
0030290419
-
"Expander codes"
-
Nov
-
M. Sipser and D. A. Spielman, "Expander codes," IEEE Trans. Inf. Theory, vol. 42, no. 6, pp. 1710-1722, Nov. 1996.
-
(1996)
IEEE Trans. Inf. Theory
, vol.42
, Issue.6
, pp. 1710-1722
-
-
Sipser, M.1
Spielman, D.A.2
-
66
-
-
0030283874
-
"Linear-time encodable and decodable error-correcting codes"
-
Nov
-
D. A. Spielman, "Linear-time encodable and decodable error-correcting codes," IEEE Trans. Inf. Theory, vol. 42, no. 6, pp. 1723-1731, Nov. 1996.
-
(1996)
IEEE Trans. Inf. Theory
, vol.42
, Issue.6
, pp. 1723-1731
-
-
Spielman, D.A.1
-
71
-
-
0025398824
-
"Aliasing errors in linear automata used as multiple-input signature analyzers"
-
Mar.-May
-
W. Daehn, T. W. Williams, and K. D. Wagner, "Aliasing errors in linear automata used as multiple-input signature analyzers," IBM J. Res. Devel., vol. 34, no. 2-3, pp. 363-380, Mar.-May 1990.
-
(1990)
IBM J. Res. Devel.
, vol.34
, Issue.2-3
, pp. 363-380
-
-
Daehn, W.1
Williams, T.W.2
Wagner, K.D.3
-
72
-
-
0038111323
-
"Analysis and design of linear finite state machines for signature analysis testing"
-
Sep
-
M. Damiani, P. Olivo, and B. Ricco, "Analysis and design of linear finite state machines for signature analysis testing," IEEE Trans. Comput., vol. 40, no. 9, pp. 1034-1045, Sep. 1991.
-
(1991)
IEEE Trans. Comput.
, vol.40
, Issue.9
, pp. 1034-1045
-
-
Damiani, M.1
Olivo, P.2
Ricco, B.3
-
76
-
-
0012523847
-
"Analysis of one-dimensional linear hybrid cellular automata over GF(q)"
-
Jul
-
K. Cattell and J. C. Muzio, "Analysis of one-dimensional linear hybrid cellular automata over GF(q)," IEEE Trans. Comput., vol. 45, no. 7, pp. 782-792, Jul. 1996.
-
(1996)
IEEE Trans. Comput.
, vol.45
, Issue.7
, pp. 782-792
-
-
Cattell, K.1
Muzio, J.C.2
-
77
-
-
0002038237
-
"Theory and application of nongroup cellular automata for synthesis of easily testable finite state machines"
-
Jul
-
S. Chakraborty, D. R. Chowdhury, and P. P. Chaudhuri, "Theory and application of nongroup cellular automata for synthesis of easily testable finite state machines," IEEE Trans. Comput., vol. 45, no. 7, pp. 769-781, Jul. 1996.
-
(1996)
IEEE Trans. Comput.
, vol.45
, Issue.7
, pp. 769-781
-
-
Chakraborty, S.1
Chowdhury, D.R.2
Chaudhuri, P.P.3
-
78
-
-
0015799311
-
"Every discrete input machine is linearly simulatable"
-
Apr
-
B. P. Zeigler, "Every discrete input machine is linearly simulatable," J. Comput. Syst. Sci., vol. 7, no. 4, pp. 161-167, Apr. 1973.
-
(1973)
J. Comput. Syst. Sci.
, vol.7
, Issue.4
, pp. 161-167
-
-
Zeigler, B.P.1
-
79
-
-
0030672484
-
"Structure approach for performance driven ECC circuit synthesis"
-
C. Su, K. Y. Chen, and S.-J. Jou, "Structure approach for performance driven ECC circuit synthesis," in Proc. Asia and South Pacific Design Automation Conf. (ASP-DAC 1997), 1997, pp. 89-94.
-
(1997)
Proc. Asia and South Pacific Design Automation Conf. (ASP-DAC 1997)
, pp. 89-94
-
-
Su, C.1
Chen, K.Y.2
Jou, S.-J.3
-
81
-
-
0016419451
-
"Estimation of the error-correction complexity for Gallager low-density codes"
-
Jan.-Mar
-
V. V. Zyablov and M. S. Pinsker, "Estimation of the error-correction complexity for Gallager low-density codes," Probl. Inf. Transm., vol. 11, no. 1, pp. 18-28, Jan.-Mar. 1975.
-
(1975)
Probl. Inf. Transm.
, vol.11
, Issue.1
, pp. 18-28
-
-
Zyablov, V.V.1
Pinsker, M.S.2
-
82
-
-
0015640121
-
"Information storage in a memory assembled from unreliable components"
-
Jul.-Sep
-
A. V. Kuznetsov, "Information storage in a memory assembled from unreliable components," Probl. Inf. Transm., vol. 9, no. 4, pp. 254-264, Jul.-Sep. 1973.
-
(1973)
Probl. Inf. Transm.
, vol.9
, Issue.4
, pp. 254-264
-
-
Kuznetsov, A.V.1
-
83
-
-
0012277251
-
"Upper bound on the redundancy of self-correcting arrangements of unreliable functional elements"
-
Jul.-Sep
-
R. L. Dobrushin and S. I. Ortyukov, "Upper bound on the redundancy of self-correcting arrangements of unreliable functional elements," Probl. Inf. Transm., vol. 13, no. 3, pp. 56-76, Jul.-Sep. 1977.
-
(1977)
Probl. Inf. Transm.
, vol.13
, Issue.3
, pp. 56-76
-
-
Dobrushin, R.L.1
Ortyukov, S.I.2
-
84
-
-
0035246320
-
"Efficient encoding of low-density parity-check codes"
-
Feb
-
T. Richardson and R. Urbanke, "Efficient encoding of low-density parity-check codes," IEEE Trans. Inf. Theory, vol. 47, no. 2, pp. 638-656, Feb. 2001.
-
(2001)
IEEE Trans. Inf. Theory
, vol.47
, Issue.2
, pp. 638-656
-
-
Richardson, T.1
Urbanke, R.2
|