Efficient synthesis of out-of-core algorithms using a nonlinear optimization solver

Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2004 (Abstracts and CD-ROM)

Volumn 18, Issue , 2004, Pages 471-480

  Krishnan, Sandhya ^a   Krishnamoorthy, Sriram ^a   Baumgartner, Gerald ^a   Lam, Chi Chung ^a   Ramanujam, J ^b   Sadayappan, P ^a   Choppella, Venkatesh ^c  

^a OHIO STATE UNIVERSITY   (United States)

^b LOUISIANA STATE UNIVERSITY   (United States)

^c INDIAN INSTITUTE OF INFORMATION TECHNOLOGY AND MANAGEMENT KERALA   (India)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; DATA ACQUISITION; NONLINEAR CONTROL SYSTEMS; OPTIMIZATION; PROBLEM SOLVING; STORAGE ALLOCATION (COMPUTER);

DATA SETS; NESTED LOOP STRUCTURE; NONLINEAR OPTIMIZATION SOLVER; PHYSICAL MEMORY;

ALGORITHMS;

EID: 12444250054     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (48)

1. A Modeling Language for Mathematical Programming (AMPL).
2. A. W. Lim, S.-W. Liao, and M. S. Lam. Blocking and array contraction across arbitrarily nested loops using ane partitioning. In Proc. of the Eigth ACM SIGPLAN Symposium on Principles and Practices of Parallel Programming, pages 103-112. ACM Press, 2001.
3. C. Lam. Performance Optimization of a Class of Loops Implementing Multi-Dimensional Integrals. PhD thesis, The Ohio State University, Columbus, OH, August 1999.
4. C. Lam, D, Cociorva, G. Baumgartner, and P. Sadayappan. Memory-optimal evaluation of expression trees involving large objects. In Proc. of Intl. Conf. on High Perf. Comp., 1999.
5. C. Lam, D. Cociorva, G. Baumgartner and P. Sadayappan. Optimization of Memory Usage and Communication Requirements for a Class of Loops Implementing MultiDimensional Integrals. In Proc. of Twelfth LCPC Workshop, 1999.
6. C. Lam, P. Sadayappan and R. Wenger. On Optimizing a Class of Multi-Dimensional Loops with Reductions for Parallel Execution. Parallel Processing Letters, 7(2):157-168, 1997.
7. C. Lam, P. Sadayappan and R. Wenger. Optimization of a Class of Multi-Dimensional Integrals on Parallel Machines. In Proc. of Eighth SIAM Conf. on Parallel Processing for Scientific Computing, 1997.
8. D. Cociorva, G. Baumgartner, C. Lam, P. Sadayappan, J. Ramanujam, M. Nooijen, D. Bernholdt, and R. Harrison. Space-Time Trade-Off Optimization for a Class of Electronic Structure Calculations. In Proc. of ACM SIGPLAN 2002 Conference on Programming Language Design and Implementation (PLDI), pages 177-186, 2002.
9. D. Cociorva, J. Wilkins, C. Lam, G. Baumgartner, P. Sadayappan, and J. Ramanujam. Loop optimization for a class of memory-constrained computations. In Proc. of the Fifteenth ACM International Conference on Supercomputing (ICS'01), pages 500-509, 2001.
10. D. Cociorva, J. Wilkins, G. Baumgartner, P. Sadayappan, J. Ramanujam, M. Nooijen, D. E. Bernholdt, and R. Harrison. Towards Automatic Synthesis of High-Performance Codes for Electronic Structure Calculations: Data Locality Optimization. In Proc. of the Intl. Conf. on High Performance Computing, volume 2228, pages 237-248. Springer-Verlag, 2001.
11. D. Cociorva, X. Gao, S. Krishnan, G. Baumgartner, C. Lam, P. Sadayappan, J. Ramanujam. Global Communication Optimization for Tensor Contraction Expressions under Memory Constraints. In Proc. of Seventeenth International Parallel and Distributed Processing Symposium (IPDPS), 2003.
12. Dr. Benjamin W. Wah and Yi Xin Chen. Web Interface for Discrete Constrained Search Solver.
13. G. Baumgartner and D.E. Bernholdt and D. Cociorva and R. Harrison and S. Hirata and C. Lam and M. Nooijen and R. Pitzer and J. Ramanujam and P. Sadayappan, A High-Level Approach to Synthesis of High-Performance Codes for Quantum Chemistry. In Proc. of Supercomputing 2002, November 2002.
14. G. Rivera and C.-W. Tseng. Eliminating Conflict Misses for High Performance Architectures. In Proc. of Intl. Conf. on Supercomputing, 1998.
15. I. Kodukula, K. Pingali, R. Cox, and D. Maydan. An experimental evaluation of tiling and shackling for memory hierarchy management. In Proc. of ACM International Conference on Supercomputing (ICS 99), 1999.
16. I. Kodukula, N. Ahmed, and K. Pingali. Data-centric multilevel blocking. In Proc. of SIGPLAN Conf. Programming Language Design and Implementation, 1997.
17. J. M. Anderson and S. P. Amarasinghe and M. S. Lam. Data and Computation Transformations for Multiprocessors. In Proc. of the Fifth ACM SIGPLAN Symposium on Principles and Practice of Parallel Processing, July 1995.
18. J. M. L. Martin. In P. v. R. Schleyer, P. R. Schreiner, N. L. Allinger, T. Clark, J. Gasteiger, P. Kollman, H. F. Schaefer III (Eds.). Encyclopedia of Computational Chemistry, 1:115-128, 1998.
19. J. Nieplocha and I. Foster. Disk Resident Arrays: An Array-Oriented I/O Library for Out-Of-Core Computations. In Proc. of the Sixth Symposium on the Frontiers of Massively Parallel Computation, pages 196-204, 1996.
20. J. Nieplocha, I. J. Harrison and R. J. Littlefield. Global Arrays: A Nonuniform Memory Access Programming Model for High-Performance Computers. The Journal of Supercomputing, 10:197-220, 1996.
21. K. S. McKinley, S. Carr and C.-W. Tseng. Improving Data Locality with Loop Transformations. ACM TOPLAS, 18(4):424-453, July 1996.
22. M. E. Wolf and M. S. Lam. A Data Locality Algorithm. In Proc. of ACM SIGPLAN PLDI, 1991.
23. M. E. Wolf, D. E. Maydan, and D. J. Chen. Combining loop transformations considering caches and scheduling. In Proc. of the Twenty Ninth Annual International Symposium on Microarchitecture, pages 274-286, 1996.
24. M. Kandemir, A. Choudhary, and J. Ramanujam. An I/O conscious tiling strategy for disk-resident data sets. The Journal of Supercomputing, 21(3):257-284, 2002.
25. M. Kandemir, A. Choudhary, J. Ramanujam, and M. Kandaswamy. A unified framework for optimizing locality, parallelism, and communication in out-of-core computations. IEEE Transactions of Parallel and Distributed Systems, 11(7):648-668, July 2000.
26. M. Kandemir, A. Choudhary, J. Ramanujam and R. Bordawekar. Compilation techniques for out-of-core parallel computations. Parallel Computing, 24(3-4):597-628, June 1998.
27. M. Paleczny, K. Kennedy, and C. Koelbel. Compiler Support for Out-of-Core Arrays on Parallel Machines. Technical Report 94509-S, Rice University, Houston, TX, December 1994.
28. M. S. Lam, E. E. Rothberg, and M. E. Wolf. The cache performance and optimizations of blocked algorithms. In Proc. of Fourth Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, 1991.
29. N, Ahmed and N. Mateev and K. Pingali. Synthesizing transformations for locality enhancement of imperfectly nested loops. In Proc. of ACM Intl. Conf. on Supercomputing, 2000.
30. N. Mitchell, K. Högstedt, L. Carter, and J. Ferrante. Quantifying the multi-level nature of tiling interactions. Intl. Journal of Parallel Programming, 26(6):641-670, June 1998.
31. R. Bordawekar. Techniques for Compiling I/O Intensive Parallel Programs. PhD thesis, Dept. of Electrical and Computer Eng., Syracuse University, April 1996.
32. R. Bordawekar, A. Choudhary, and J. Ramanujam. Automatic Optimization of Communication in Out-of-Core Stencil Codes. In Proc. of Tenth ACM International Conference on Supercomputing, pages 366-373, 1996.
33. R. Bordawekar, A. Choudhary, K. Kennedy, C. Koelbel, and M. Paleczny, A Model and Compilation Strategy for Out-of-Core Data-Parallel Programs. In Proc. of the Fifth ACM Symposium on Principles and Practice of Parallel Programming, 1995.
34. R. Thakur, R. Bordawekar, A. Choudhary, R. Ponnusamy, and T. Singh. PASSION Runtime Library for Parallel I/O. In Proc. of Scalable Parallel Libraries Conference, pages 119-128, 1994.
35. S. Coleman and K. S. McKinley. Tile Size Selection Using Cache Organization and Data Layout. In Proc. of the SIGPLAN '95 Conference on Programming Languages Design and Implementation, 1995.
36. S. Ghosh, M. Martonosi and S. Malik. Precise Miss Analysis for Program Transformations with Caches of Arbitrary Associativity. In Proc. of the Eighth ACM Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, 1998.
37. S. Krishnamoorthy, G. Baumgartner, D. Cociorva, C. Lam and P. Sadayappan. On Efficient Out-of-core Matrix Transposition. Technical Report OSU-CIRSC-9/03-T52, The Ohio State University, Columbus, OH, September 2003.
38. S. Krishnan. DataLocality Optimization for Synthesis of Out-of-Core Programs. Master's thesis, The Ohio State University, Columbus, OH, September 2003.
39. S. Krishnan, S. Krishnamoorthy, G. Baumgartner, D. Cociorva, C. Lam, P. Sadayappan, J. Ramanujam, D. E. Bernholdt, and V. Choppella. Data Locality Optimization for Synthesis of Efficient Out-of-Core Algorithms. In Proc. of the Intl. Conf. on High Performance Computing, 2003.
40. T. Cormen and A. Colvin. ViC*: A Preprocessor for VirtualMemory C*. Technical Report PCS-TR94-243, Dartmouth College, November 1994.
41. T. J. Lee and G. E. Scuseria. Achieving chemical accuracy with coupled cluster theory. In S. R. Langhoff (Ed.). Quantum Mechanical Electronic Structure Calculations with Chemical Accuracy, pages 47-109, 1997.
42. T. Mowry, A. Demke, and O. Krieger. Automatic Compiler-Inserted I/O Prefetching for Out-of-Core Applications. In Proc. of Second Symposium on Operating Systems Design and Implementations, pages 3-17, 1996.
43. T. Wang, Global Optimization of Constrained Nonlinear Programming. PhD thesis, University of Illinois at Urbana-Champaign, IL, December 2000.
44. The Ohio Supercomputer Center.
45. W. Li, Compiling for NUMA Parallel Machines. PhD thesis, Cornell University, August 1993.
46. W. Li, Compiler cache optimizations for banded matrix problems. In Proc. of International Conference on Supercomputing, 1995.
47. Y. Chen, M. Winslett, Y. Cho, and S. Kuo. Automatic parallel I/O performance optimization. In Proc. of Tenth Annual ACM Symposium on Parallel Algorithms and Architectures, 1998.
48. Y. Song and Z. Li. New Tiling Techniques to Improve Cache Temporal Locality. In Proc. of ACM SIGPLAN PLDI, 1999.