A chip-on-beam calibration technique for piezoresistive stress sensor die

Advances in Electronic Packaging

Volumn 1, Issue , 2003, Pages 845-852

  Jaeger, Richard C ^a   Suhling, Jeffrey C ^a   Chen, Yonggang ^a   Rahaman, Shahan ^a   Nokibul Islam, M ^a  

^a AUBURN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CALIBRATION; COMPUTER SIMULATION; DIES; ELECTRIC CONDUCTIVITY; FINITE ELEMENT METHOD; INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; SENSORS; SILICON WAFERS; STRESS CONCENTRATION; THERMAL LOAD; CHIP SCALE PACKAGES; SEMICONDUCTING SILICON COMPOUNDS; STRESS MEASUREMENT;

MECHANICAL LOADINGS; PIEZORESISTIVE STRESSES;

ELECTRONICS PACKAGING; SILICON WAFERS;

BEAM GEOMETRY; CALIBRATION TECHNIQUES; CHIP DIMENSIONS; EXPERIMENTAL CONDITIONS; EXPERIMENTAL MEASUREMENTS; FINITE ELEMENT SIMULATIONS; FOUR-POINT; HIGH ACCURACY CALIBRATION; NONUNIFORM STRESS DISTRIBUTION; PIEZORESISTIVE COEFFICIENTS; PIEZORESISTIVE STRESS SENSORS; SEMI-CONDUCTOR FABRICATION; SILICON BEAMS; STRESS SENSOR; WAFER LEVEL;

EID: 1242331960     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

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