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Volumn 8, Issue 12, 2004, Pages 715-717

Improved progressive-edge-growth (PEG) construction of irregular LDPC codes

Author keywords

Error floor; Irregular low density parity check (LDPC) codes; LDPC codes; LDPC codes at finite block lengths; Near codewords; Progressive edge growth (PEG) algorithm; Short LDPC codes; Trapping sets

Indexed keywords

ALGORITHMS; BIT ERROR RATE; COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER SIMULATION; PHASE SHIFT KEYING; SIGNAL TO NOISE RATIO; WHITE NOISE;

EID: 11844282786     PISSN: 10897798     EISSN: None     Source Type: Journal    
DOI: 10.1109/LCOMM.2004.839612     Document Type: Article
Times cited : (175)

References (11)
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  • 3
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    • (2001) , pp. 995-1001
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  • 4
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    • "Irregular progressive edge-growth (PEG) Tanner graphs"
    • Proc. IEEE ISIT 2002, Lausanne, Switzerland, June 30-July 5
    • X.-Y. Hu E. Eleftheriou, and D.-M. Arnold, "Irregular progressive edge-growth (PEG) Tanner graphs," in Proc. IEEE ISIT 2002. Lausanne, Switzerland, June 30-July 5, 2002, pp. 480-480.
    • (2002) , pp. 480
    • Hu, X.-Y.1    Eleftheriou, E.2    Arnold, D.-M.3
  • 5
    • 12544253129 scopus 로고    scopus 로고
    • "Regular and irregular progressive edge-growth Tanner graphs"
    • submitted for publication
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  • 6
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    • [Online] Available: www.inference.phy.cam.ac.uk/mackay/PEG_ECC.html
    • D. J. C. Mackay.. [Online]. Available: www.inference.phy.cam.ac.uk/ mackay/PEG_ECC.html
    • Mackay, D.J.C.1
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    • "Error floors of LDPC codes"
    • Proc. 41st Annu. Allerton Conf. on Communication, Control, and Computing, Urbana-Champaign, Oct
    • T. Richardson, "Error floors of LDPC codes," in Proc. 41st Annu. Allerton Conf. on Communication, Control, and Computing, Urbana-Champaign, Oct. 2003, pp. 1426-1435.
    • (2003) , pp. 1426-1435
    • Richardson, T.1
  • 9
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    • "Design of capacity-approaching irregular low-density parity-check codes"
    • Feb
    • T. Richardson, M. A. Shokrollahi, and R. Urbanke, "Design of capacity-approaching irregular low-density parity-check codes," IEEE Trans. Inform. Theory, vol. 47, pp. 619-637, Feb. 2001.
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    • Richardson, T.1    Shokrollahi, M.A.2    Urbanke, R.3
  • 10
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    • Proc. IEEE Int. Conf. Communications, Anchorage, AK, May
    • T. Tian, C. Jones, J. D. Villasenor, and R. D. Wesel, "Construction of irregular LDPC codes with low error floors," in Proc. IEEE Int. Conf. Communications, vol. 5, Anchorage, AK, May 2003, pp. 3125-3129.
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    • Tian, T.1    Jones, C.2    Villasenor, J.D.3    Wesel, R.D.4
  • 11
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    • "Selective avoidance of cycles in irregular LDPC code construction"
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    • T. Tian, C. Jones, J. D. Villasenor, and R. D. Wesel, "Selective avoidance of cycles in irregular LDPC code construction," IEEE Trans. Commun., vol. 52, pp. 1242-1247, Aug. 2004.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.