Early Estimation of the Size of VHDL Projects

Hardware/Software Codesign - Proceedings of the International Workshop

Volumn , Issue , 2003, Pages 207-212

  Fornaciari, William ^a   Salice, Fabio ^a   Scarpazza, Daniele Paolo ^a  

^a POLITECNICO DI MILANO   (Italy)

Author keywords

Cost estimation; Design metrics; Embedded systems; System level design; VHDL analysis

Indexed keywords

COST ESTIMATION; DESIGN METRICS; SYSTEM-LEVEL DESIGN; VHDL ANALYSIS;

ALGORITHMS; COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER ARCHITECTURE; COSTS; EMBEDDED SYSTEMS; ESTIMATION; GRAPH THEORY; INTERFACES (COMPUTER); MATHEMATICAL MODELS; PROJECT MANAGEMENT; SYSTEMS ANALYSIS; VOLTMETERS;

COMPUTER HARDWARE DESCRIPTION LANGUAGES;

EID: 1142287743     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/944696.944699     Document Type: Conference Paper

References (10)

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4. P. J. Ashenden, The Designer's Guide to VHDL. Morgan Kauffmann Publishers, San Francisco, 1995.
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6. P. S. Elliot and M. Gumm, MVP v1.1, Institute for Parallel and Distributed Systems, Stuttgart, Germany, 1994.
7. William Fornaciari et al., Development cost and size estimation starting from high-level specifications. In Proc. 9th Intl. Symposium on Hw/sw Codesign, pages 86-91, ACM Press, 2001.
8. IEEE Standards Board, ANSI/IEEE Std 1076-1993, IEEE Standard VHDL Language Reference Manual.
9. D. P. Scarpazza, VHDL effort estimation on-line resources at CEFRIEL, www.cefriel.it/vhdl-estimate.
10. D. P. Scarpazza, Development effort and size estimation for partially specified VHDL projects. CEFRIEL Internal report, 2002.