Development cost and size estimation starting from high-level specifications

Hardware/Software Codesign - Proceedings of the International Workshop

Volumn , Issue , 2001, Pages 86-91

  Fornaciari, W ^a   Salice, F ^a   Bondi, U ^a   Magini, E ^a  

^a POLITECNICO DI MILANO   (Italy)

Author keywords

Concurrent engineering; Design reuse; Process management; Project size estimation; VHDL

Indexed keywords

COMPUTER HARDWARE; COMPUTER SIMULATION; COMPUTER SOFTWARE; CONCURRENT ENGINEERING; MICROPROCESSOR CHIPS; PROBLEM SOLVING;

PROCESS MANAGEMENT;

SYSTEMS ANALYSIS;

EID: 0034837596     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/371636.371690     Document Type: Conference Paper

References (7)

1. Lambda-block analysis of VHDL for design reuse