A mixed equation-based and simulation-based design methodology for continuous-time sigma-Delta modulators

Midwest Symposium on Circuits and Systems

Volumn 1, Issue , 2004, Pages

  Aboushady, H ^a   De Lamarre, L ^a   Beilleau, N ^a   Louerat, M M ^a  

^a SORBONNE UNIVERSITÉ   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POTENTIAL; FAST FOURIER TRANSFORMS; MATHEMATICAL MODELS; MATHEMATICAL TRANSFORMATIONS; OPTIMIZATION; TRANSCONDUCTANCE;

FEEDBACK SIGNALS; LAYOUT GENERATIONS; SIGMA-DELTA MODULATORS;

MODULATORS;

EID: 11144247309     PISSN: 15483746     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. K. Francken and G. Gielen. "A High-Level Simulation and Synthesis Environment for AS Modulators". IEEE Transactions on Computer-Aided Design of integrated Circuits and Systems, vol. 22(No. 8):1049-1061, Aug. 2003.
2. F. Medeiro, B. Pérez-Verdú, A. Rodríguez-Vázquez, and J. L. Huertas. "A Vertically Integrated Tool for Automated Design of ∑Δ Modulators". IEEE Journal of Solid-State Circuits, vol. 88(No. 12):762-772, July 1995.
3. M. Dessouky, A. Kaiser, M. Louërat, and A. Greiner. "Analog Design for Reuse - Case Study: Very Low-Voltage AS Modulator". IEEE Design Automation and Test in Europe Conference, pages 353-360. Mar, 2000.
4. R. van Veldhoven, K. Philips, and B. Minnis. "A 3.3mW SA modulator for UMTS in 0.18 μm CMOS with 70 dB dynamic range in 2 MHz bandwidth". IEEE International Solid State Conference., Feb. 2002.
5. H. Aboushady and M.-M. Louërat. "Systematic Approach for Discrete-Time to Continuous-Time Transformation of SA Modulators". ISCAS. May 2002.
6. N. Beilleau, H. Aboushady, and M.-M. Louërat. "Systematic Approach for Scaling Coefficients of Continuous-Time Sigma-Delta Modulators". MWSCAS, Dec. 2003.
7. H. Aboushady and M.-M. Louërat. "Low-Power Design of Low-Voltage Current-Mode Integrators for Continuous-Time ∑Δ Modulators". ISCAS, May 2001.
8. M. Dessouky, M. Louërat, and J. Porte. "Layout-Oriented Synthesis of High-Performance Analog Circuits". IEEE Design Automation and Test in Europe Conference, pages 53-57, Mar. 2000.
9. P. Nguyen-Tuong, M.-M. Louërat, and A. Greiner. "Placement optimal d'objets déformables dans l'environnement de conception analogique CAIRO+". Colloque CAO de circuits et systèmes integrés, http://asim.lip6.fr/gdrcao/articles, May 2002.