Implementation of a large scale hardware neural network system Based on stochastic logic

IEEE International Conference on Neural Networks - Conference Proceedings

Volumn 4, Issue , 2004, Pages 2671-2675

  Momoi, Akiyoshi ^a   Akimoto, Shunsuke ^a   Sato, Shigeo ^a   Nakajima, Koji ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CODING CIRCUITS; DIGITAL PULSES; PULSE SEQUENCES; STOCHASTIC LOGIC;

CODES (STANDARDS); COMPUTER HARDWARE; FORMAL LOGIC; LARGE SCALE SYSTEMS; RANDOM PROCESSES; SPURIOUS SIGNAL NOISE; VLSI CIRCUITS;

NEURAL NETWORKS;

EID: 10944239606     PISSN: 10987576     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IJCNN.2004.1381070     Document Type: Conference Paper

References (9)

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