A multiplierless 2-D convolver chip for real-time image processing

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 38, Issue 1, 2004, Pages 63-71

  Sunwoo, Myung H ^a,b,c   Oh, Seong K ^a,d,e  

^a Ajou University   (South Korea)

^b Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

^c MOTOROLA INC   (United States)

^d SAMSUNG Electronics   (South Korea)

^e SIMON FRASER UNIVERSITY   (Canada)

Author keywords

Convolution; Digital filter; Image processing; Multiplier; VLSI architecture; VLSI design

Indexed keywords

MULTIPLIERLESS ARCHITECTURES; REAL-TIME IMAGE PROCESSING; VLSI ARCHITECTURES; VLSI DESIGNS;

ALGORITHMS; COMPUTER VISION; CONVOLUTION; DIGITAL FILTERS; DIGITAL SIGNAL PROCESSING; REAL TIME SYSTEMS; VLSI CIRCUITS;

IMAGE PROCESSING;

EID: 10844238969     PISSN: 13875485     EISSN: None     Source Type: Journal    
DOI: 10.1023/B:VLSI.0000028534.35761.a8     Document Type: Article

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