Design of a low-power VLSI macrocell for nonlinear adaptive video noise reduction

Eurasip Journal on Applied Signal Processing

Volumn 2004, Issue 12, 2004, Pages 1921-1930

  Saponara, Sergio ^a   Fanucci, Luca ^b   Terreni, Pierangelo ^a  

^a UNIVERSITY OF PISA   (Italy)

^b CNR   (Italy)

Author keywords

Adaptive filters; Low power design; Nonlinear image processing; Very large scale integration architectures; Video noise reduction

Indexed keywords

CMOS INTEGRATED CIRCUITS; DECODING; IMAGE ANALYSIS; IMAGE PROCESSING; POWER AMPLIFIERS; REAL TIME SYSTEMS; VIDEO AMPLIFIERS; VLSI CIRCUITS;

ADAPTIVE FILTERS; LOW-POWER DESIGN; NONLINEAR IMAGE PROCESSING; VERY LARGE SCALE INTEGRATION ARCHITECTURES; VIDEO NOISE REDUCTION;

NOISE ABATEMENT;

EID: 10444239435     PISSN: 11108657     EISSN: None     Source Type: Journal    
DOI: 10.1155/S1110865704403035     Document Type: Article

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