Improving signal integrity of system packaging by back-drilling Plated Through Holes in board assembly

Proceedings - Electronic Components and Technology Conference

Volumn 2, Issue , 2004, Pages 1220-1226

  Camerlo, Sergio ^a   Ahmad, Bilal ^a   Zou, Yida ^a   Dang, Lekhanh ^a   Hu, Mason ^a   Priore, Scott ^a  

^a CISCO SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BACK-DRILLING; COEFFICIENT OF THERMAL EXPANSION (CTE); CYCLIC STRAIN; PLASTIC STRAIN;

COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER SIMULATION; CROSSTALK; DRILLING; DUCTILITY; ELASTIC MODULI; FAILURE ANALYSIS; FATIGUE OF MATERIALS; FINITE ELEMENT METHOD; PRINTED CIRCUIT DESIGN; PRINTED CIRCUIT TESTING; SIGNAL FILTERING AND PREDICTION; SILICON; STRAIN;

CHIP SCALE PACKAGES;

EID: 10444223066     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. Sergio Camerlo, "6.25 Gb/s Backplane Technology in ISBU", Cisco internal document, September 2002.
2. Ahmad, B., "The Present and Near Term Future of Electrical Backplanes", Cisco internal document, October, 2002.
3. Ahmad, B., and S. Camerlo, "Switch Fabric Interface (SFI) versus good old parallel backplanes: A time and place for each", High-performance System Design conference panel, DesignCon, 2002
4. Subhash Pochareddy, Lavanya Gopalakrishnan, Rajat Srivastava, "High Speed Transmission Line Requirements - Impact on Performance, PCB Layout, Fabrication and Reliability", CircuiTree, June 2003.
5. M.Ahmad, S. Teng, M.Hu, M. Brillhart, "Assessing the Reliability of Plated Vias", PC Fab, Nov. 2002.
6. st IEEE Electronic Components and Technology Conference, 1991.
7. S. Rominger, "Predicting Reliability of Printed Wiring Boards with Variable parameters Using Finite Element Modeling", CircuiTree, May 2000.
8. Timo Tarvainen, "Studies on Via Coupling on Multilayer Printed Circuit Boards", Academic dissertation, University of Oulu, 1999.
9. Sergio Camerlo, "Packaging Technology in ELoB", Cisco internal document, May 1999.
10. Sergio Camerlo, "Packaging Technology - Status Update", Cisco internal document, October 2001.