The FAB predictor: Using Fourier analysis to predict the outcome of conditional branches

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn 2002-January, Issue , 2002, Pages 223-232

  Kampe, M ^a   Stenstrom P ^a   Dubois, M ^b  

^a CHALMERS UNIVERSITY OF TECHNOLOGY   (Sweden)

^b University of Southern California ^*  (United States)

Author keywords

Accuracy; Data compression; Fourier transforms; Frequency domain analysis; History; Parallel processing; Pattern analysis; Pipelines; Runtime; Time domain analysis

Indexed keywords

COMPUTER ARCHITECTURE; DATA COMPRESSION; FOURIER ANALYSIS; FOURIER TRANSFORMS; FREQUENCY DOMAIN ANALYSIS; HISTORY; PIPELINES; SUPERCOMPUTERS;

ACCURACY; BRANCH PREDICTORS; CONDITIONAL BRANCH; FREQUENCY DOMAINS; IMPLEMENTATION APPROACH; PARALLEL PROCESSING; PATTERN ANALYSIS; RUNTIMES;

TIME DOMAIN ANALYSIS;

EID: 0348126355     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2002.995712     Document Type: Conference Paper

References (22)

1. Doug Burger and M. Todd Austin. The SimpleScalar Tool Set, Version 2. Technical report, University of Wisconsin-Madison Computer Science Department, 1997.
2. Po-Yung Chang, Eric Hao, Tse-Yu Yeh, and Patt Yale. Branch Classification: a New Mechanism for Improving Branch Predictor Performance. In Proceedings of the 27th Annual International Symposium on Microarchitecture, pages 22-31, Nowember 1994.
3. Pohua P. Chang, Scott A. Mahlke, and Wen-mei W. Hwu. Using Profile Information to Assist Classic Code Optimizations. Software - Practice and Experience (SPE), 21(12):1301-1321, 1991.
4. Robert S. Chappell, Jared Stark, Sangwook P. Kim, Steven K. Reinhardt, and Yale N. Patt. Simultanious Subordinate Microthreading (SSMT). In Proceedings of the 26th International Symposium on Computer Architecture, pages 186-195, May 1999.
5. I-Cheng K. Chen, John T. Coffey, and Trevor N. Mudge. Analysis of Branch Prediction via Data Compression. In Proceedings of the ASPLOS VII, pages 128-137, October 1996.
6. Brian L. Deitrich, Ben-Chung Cheng, and Wen-mei W. Hwu. Improving Static Branch Prediction in a Compiler. In Proceedings of the Parallel Architectures and Compilation Techniques, pages 214-221, October 1998.
7. Michel Dubois and Yong Ho Song. Assited Execution. Technical report, University of Southern California Department of Electrical Engineering, 1998.
8. Marius Evers, Sanjay J. Patel, Robert S. Chappell, and Yale N. Patt. An Analysis of Correlation and Predictability: What Makes Two-Level Branch Predictors Work. In Proceedings of the 25th International Symposium on Computer Architecture, pages 52-61, June 1998.
9. Eitan Federovsky, Meir Feder, and Shlomo Weiss. Branch Prediction Based on Universal Data Compression Algorithms. In Proceedings of the 25th International Symposium on Computer Architecture, pages 62-71, June 1998.
10. Joseph A. Fisher and Stefan M. Freudenberg. Predicting Conditional Branch Directions From Previous Runs of a Program. In Proceedings of the ASPLOS V, pages 85-95, October 1992.
11. Matteo Frigo and Steven G. Johnson. FFTW User's Manual. http://www.fftw.org/, November 1999.
12. Michael Haungs, Phil Sallee, and Matthew Farrens. Branch Transistion Rate: A New Metric form Improved Branch Classification Analysis. In Proceedings of the 6th International Symposium on High-Performance Computer Architecture, pages 241-250, January 2000.
13. Daniel A. Jimenez, Heather L. Hanson, and Calvin Lin. Boolean Formula-based Branch Prediction for Future Technologies. In Proceedings of the Parallel Architectures and Compilation Techniques, pages 97-106, September 2001.
14. Daniel A. Jimenez and Calvin Lin. Dynamic Branch Prediction with Perceptrons. In Proceedings of the 7th International Symposium on High-Performance Computer Architecture, Jannuary 2001.
15. Alan V. Oppenheim, Alan S. Willsky, and Ian T. Young. Signals and Systems. Prentice-Hall International Inc., 1 edition, 1983.
16. Yale N. Patt, Sanjay J. Patel, Evers Marius, Daniel H. Friendly, and Jared Stark. One BillionTransistors, One Uniprocessor, One Chip. COMPUTER, 30(9):51-57, 1997.
17. Jim Smith. A Study of Branch Prediction Strategies. In Proceedings of the 8th International Symposium on Computer Architecture, pages 135-148, May 1981.
18. The Standard Performance Evaluation Corporation (SPEC). SPEC 95 Benchmarks. http://www.spec.org/, August 1995.
19. J. Voldman and Lee W. Hoevel. The software-cache connection. IBM Journal of Research and Development, 25(6):877-893, November 1981.
20. Tse-Yu Yeh and Yale Patt. Two-Level Adaptive Branch Prediction. In Proceedings of the 24th Annual ACM/IEEE International Symposium on Microarcitecture, pages 51-61, November 1991.
21. Tse-Yu Yeh and Yale Patt. Alternative Implementations of Two-Level Adaptive Branch Prediction. In Proceedings of the 19th Annual International Symposium on Computer Arcitecture, pages 124-134, December 1992.
22. Tse-Yu Yeh and Yale N. Patt. A Comparison of Dymaic Branch Predictors that use Two Levels of Branch History. In Proceedings of the 20th International Symposium on Computer Architecture, pages 257-266, May 1993.